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25LC040 Datasheet

  • 25LC040

  • 4K SPI Bus Serial EEPROM

  • 589.69KB

  • 22页

  • Microchip   Microchip

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25AA040/25LC040/25C040
3.5
Read Status Register (RDSR)
3.6
Write Status Register(WRSR)
The RDSR instruction provides access to the status
register. The status register may be read at any time,
even during a write cycle. The status register is format-
ted as follows:
7
X
6
X
5
X
4
X
3
BP1
2
BP0
1
WEL
0
WIP
The WRSR instruction allows the user to select one of
four levels of protection for the array by writing to the
appropriate bits in the status register. The array is
divided up into four segments. The user has the ability
to write protect none, one, two, or all four of the seg-
ments of the array. The partitioning is controlled as
illustrated in Table 3-2.
See Figure 3-7 for WRSR timing sequence
The
Write-In-Process (WIP)
bit indicates whether the
25xx040 is busy with a write operation. When set to a
鈥?鈥?a write is in progress, when set to a 鈥?鈥?no write is in
progress. This bit is read only.
The
Write Enable Latch (WEL)
bit indicates the status
of the write enable latch. When set to a 鈥?鈥?the latch
allows writes to the array, when set to a 鈥?鈥?the latch
prohibits writes to the array. The state of this bit can
always be updated via the WREN or WRDI commands
regardless of the state of write protection on the status
register. This bit is read only.
The
Block Protection (BP0 and BP1)
bits indicate
which blocks are currently write protected. These bits
are set by the user issuing the WRSR instruction.
These bits are non-volatile.
See Figure 3-6 for RDSR timing sequence
TABLE 3-2:
BP1
0
0
1
1
ARRAY PROTECTION
BP0
0
1
0
1
Array Addresses
Write Protected
none
upper 1/4
(0180h - 01FFh)
upper 1/2
(0100h - 01FFh)
all
(0000h - 01FFh)
FIGURE 3-6:
READ STATUS REGISTER SEQUENCE
CS
0
SCK
instruction
SI
0
0
0
0
0
1
0
1
data from status register
7
6
5
4
3
2
1
0
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
high impedance
SO
FIGURE 3-7:
WRITE STATUS REGISTER SEQUENCE
CS
0
SCK
instruction
SI
0
0
0
0
0
0
0
1
7
6
data to status register
5
4
3
2
1
0
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
high impedance
SO
漏
1997 Microchip Technology Inc.
Preliminary
DS21204A-page 9

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