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dsPIC30F4012 Datasheet

  • dsPIC30F4012

  • High-Performance, 16-bit Digital Signal Controllers

  • 2035.22KB

  • 238页

  • Microchip   Microchip

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dsPIC30F2010
Table 1-1 provides a brief description of device I/O
pinouts and the functions that may be multiplexed to a
port pin. Multiple functions may exist on one port pin.
When multiplexing occurs, the peripheral module鈥檚
functional requirements may force an override of the
data direction of the port pin.
TABLE 1-1:
Pin Name
AN0-AN5
AV
DD
AV
SS
CLKI
CLKO
PINOUT I/O DESCRIPTIONS
Pin
Type
I
P
P
I
O
Buffer
Type
Analog
P
P
Analog input channels.
Positive supply for analog module.
Ground reference for analog module.
Description
ST/CMOS External clock source input. Always associated with OSC1 pin function.
鈥?/div>
Oscillator crystal output. Connects to crystal or resonator in Crystal
Oscillator mode. Optionally functions as CLKO in RC and EC modes. Always
associated with OSC2 pin function.
ST
ST
ST
ST
ST
ST
ST
ST
ST
ST
ST
ST
ST
ST
ST
ST
ST
鈥?/div>
鈥?/div>
鈥?/div>
鈥?/div>
鈥?/div>
鈥?/div>
ST
ST
鈥?/div>
Input change notification inputs.
Can be software programmed for internal weak pull-ups on all inputs.
ICD Primary Communication Channel data input/output pin.
ICD Primary Communication Channel clock input/output pin.
ICD Secondary Communication Channel data input/output pin.
ICD Secondary Communication Channel clock input/output pin.
ICD Tertiary Communication Channel data input/output pin.
ICD Tertiary Communication Channel clock input/output pin.
ICD Quaternary Communication Channel data input/output pin.
ICD Quaternary Communication Channel clock input/output pin.
Capture inputs. The dsPIC30F2010 has 4 capture inputs. The inputs are
numbered for consistency with the inputs on larger device variants.
Quadrature Encoder Index Pulse input.
Quadrature Encoder Phase A input in QEI mode.
Auxiliary Timer External Clock/Gate input in Timer mode.
Quadrature Encoder Phase A input in QEI mode.
Auxiliary Timer External Clock/Gate input in Timer mode.
External interrupt 0
External interrupt 1
External interrupt 2
PWM Fault A input
PWM 1 Low output
PWM 1 High output
PWM 2 Low output
PWM 2 High output
PWM 3 Low output
PWM 3 High output
Master Clear (Reset) input or programming voltage input. This pin is an active-
low Reset to the device.
Compare Fault A input (for Compare channels 1, 2, 3 and 4).
Compare outputs.
CN0-CN7
EMUD
EMUC
EMUD1
EMUC1
EMUD2
EMUC2
EMUD3
EMUC3
IC1, IC2, IC7,
IC8
INDX
QEA
QEB
INT0
INT1
INT2
FLTA
PWM1L
PWM1H
PWM2L
PWM2H
PWM3L
PWM3H
MCLR
OCFA
OC1-OC2
OSC1
OSC2
I
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I
I
I
I
I
I
I
I
O
O
O
O
O
O
I/P
I
O
I
I/O
ST/CMOS Oscillator crystal input. ST buffer when configured in RC mode; CMOS
otherwise.
鈥?/div>
Oscillator crystal output. Connects to crystal or resonator in Crystal Oscillator
mode. Optionally functions as CLKO in RC and EC modes.
Analog = Analog input
O
= Output
P
= Power
Legend:
CMOS = CMOS compatible input or output
ST
= Schmitt Trigger input with CMOS levels
I
= Input
漏
2006 Microchip Technology Inc.
DS70118G-page 7

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