PIC12CE674 Datasheet

IC型号：
PIC12CE674
PDF描述：
8-Pin, 8-Bit CMOS Microcontroller with A/D Converter and EEP...
文件大小：
1264.35KB
PDF页数：
129页
芯片厂家：
Microchip

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PIC12CE67X

4.3

PCL and PCLATH

4.3.2

STACK

The program counter (PC) is 13-bits wide. The low byte

comes from the PCL register, which is a readable and

writable register. The high byte (PC<12:8>) is not

directly readable or writable and comes from PCLATH.

On any reset, the PC is cleared. Figure 4-10 shows the

two situations for the loading of the PC. The upper

example in the 铿乬ure shows how the PC is loaded on a

write to PCL (PCLATH<4:0>

鈫?/div>

PCH). The lower exam-

ple in the 铿乬ure shows how the PC is loaded during a

CALL

GOTO

instruction (PCLATH<4:3>

鈫?/div>

PCH).

The PIC12C67X family has an 8 level deep x 13-bit

wide hardware stack. The stack space is not part of

either program or data space and the stack pointer is

not readable or writable. The PC is PUSHed onto the

stack when a

CALL

instruction is executed or an inter-

rupt causes a branch. The stack is POPed in the event

of a

RETURN, RETLW

or a

RETFIE

instruction execution.

PCLATH is not affected by a PUSH or POP operation.

The stack operates as a circular buffer. This means that

after the stack has been PUSHed eight times, the ninth

push overwrites the value that was stored from the 铿乺st

push. The tenth push overwrites the second push (and

so on).

Note 1:

There are no status bits to indicate stack

over铿俹w or stack under铿俹w conditions.

Note 2:

There are no instructions/mnemonics

called PUSH or POP. These are actions

that occur from the execution of the

CALL,

RETURN, RETLW,

and

RETFIE

instruc-

tions, or the vectoring to an interrupt

address.

FIGURE 4-10: LOADING OF PC IN

DIFFERENT SITUATIONS

PCH

PCLATH<4:0>

PCL

Instruction with

PCL as

Destination

ALU result

PCLATH

PCH

PCLATH<4:3>

Opcode <10:0>

PCLATH

11 10

PCL

GOTO, CALL

4.4

Program Memory Paging

4.3.1

COMPUTED GOTO

The PIC12CE67X ignores both paging bits

PCLATH<4:3>, which are used to access program

memory when more than one page is available. The

use of PCLATH<4:3> as general purpose read/write

bits for the PIC12CE67X is not recommended since

this may affect upward compatibility with future prod-

ucts.

A computed GOTO is accomplished by adding an off-

set to the program counter (ADDWF

PCL).

When doing a

table read using a computed GOTO method, care

should be exercised if the table location crosses a PCL

memory boundary (each 256 byte block). Refer to the

application note

鈥淚mplementing a Table Read"

(AN556).

DS40181B-page 22

Preliminary

漏

1998 Microchip Technology Inc.

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