鈭?/div>
[0,1]
(W) .XOR. (f)
鈫?(dest)
Z
00
0110
dfff
ffff
Exclusive OR the contents of the W
register with register 'f'. If 'd' is 0 the
result is stored in the W register. If 'd'
is 1 the result is stored back in register
'f'.
f,d
Status Affected: None
00
0000
0110
0fff
Status Affected:
Encoding:
Description:
The instruction is supported for code
compatibility with the PIC16C5X prod-
ucts. Since TRIS registers are read-
able and writable, the user can directly
address them.
Words:
Cycles:
Example
1
1
To maintain upward compatibility
with future PIC12C67X products,
do not use this instruction.
Words:
Cycles:
Example
1
1
XORWF
REG
1
Before Instruction
REG
W
=
=
0xAF
0xB5
After Instruction
REG
W
=
=
0x1A
0xB5
漏
1998 Microchip Technology Inc.
Preliminary
DS40181B-page 73