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PIC17C752 Datasheet

  • PIC17C752

  • High-Performance 8-bit CMOS EPROM Microcontrollers with 10-b...

  • 3053.02KB

  • 304页

  • Microchip   Microchip

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PIC17C75X
7.7
Program Counter Module
Using Figure 7-10, the operations of the PC and
PCLATH for different instructions are as follows:
a)
LCALL
instructions:
An 8-bit destination address is provided in the
instruction (opcode). PCLATH is unchanged.
PCLATH
鈫?/div>
PCH
Opcode<7:0>
鈫?/div>
PCL
Read instructions on PCL:
Any instruction that reads PCL.
PCL
鈫?/div>
data bus
鈫?/div>
ALU or destination
PCH
鈫?/div>
PCLATH
Write instructions on PCL:
Any instruction that writes to PCL.
8-bit data
鈫?/div>
data bus
鈫?/div>
PCL
PCLATH
鈫?/div>
PCH
Read-Modify-Write instructions on PCL:
Any instruction that does a read-write-modify
operation on PCL, such as
ADDWF PCL.
Read: PCL
鈫?/div>
data bus
鈫?/div>
ALU
Write: 8-bit result
鈫?/div>
data bus
鈫?/div>
PCL
PCLATH
鈫?/div>
PCH
RETURN
instruction:
Stack<MRU>
鈫?/div>
PC<15:0>
The Program Counter (PC) is a 16-bit register. PCL,
the low byte of the PC, is mapped in the data memory.
PCL is readable and writable just as is any other regis-
ter. PCH is the high byte of the PC and is not directly
addressable. Since PCH is not mapped in data or pro-
gram memory, an 8-bit register PCLATH (PC high
latch) is used as a holding latch for the high byte of the
PC. PCLATH is mapped into data memory. The user
can read or write PCH through PCLATH.
The 16-bit wide PC is incremented after each instruc-
tion fetch during Q1 unless:
鈥?Modi铿乪d by a
GOTO, CALL, LCALL, RETURN,
RETLW,
or
RETFIE
instruction
鈥?Modi铿乪d by an interrupt response
鈥?Due to destination write to PCL by an instruction
鈥淪kips鈥?are equivalent to a forced NOP cycle at the
skipped address.
Figure 7-10 and Figure 7-11 show the operation of the
program counter for various situations.
b)
c)
d)
FIGURE 7-10: PROGRAM COUNTER
OPERATION
Internal data bus <8>
8
PCLATH
8
PCH
PCL
8
e)
Using Figure 7-11, the operation of the PC and
PCLATH for
GOTO
and
CALL
instructions is as follows:
CALL, GOTO
instructions:
A 13-bit destination address is provided in the
instruction (opcode).
Opcode<12:0>
鈫?/div>
PC<12:0>
PC<15:13>
鈫?/div>
PCLATH<7:5>
Opcode<12:8>
鈫?/div>
PCLATH<4:0>
The read-modify-write only affects the PCL with the
result. PCH is loaded with the value in the PCLATH.
For example,
ADDWF PCL
will result in a jump within the
current page. If PC = 03F0h, WREG = 30h and
PCLATH = 03h before instruction, PC = 0320h after the
instruction. To accomplish a true 16-bit computed
jump, the user needs to compute the 16-bit destination
address, write the high byte to PCLATH and then write
the low value to PCL.
The following PC related operations do not change
PCLATH:
a)
b)
c)
LCALL, RETLW,
and
RETFIE
instructions.
Interrupt vector is forced onto the PC.
Read-modify-write instructions on PCL (e.g.
BSF PCL).
FIGURE 7-11: PROGRAM COUNTER USING
THE
CALL
AND
GOTO
INSTRUCTIONS
15
13 12
8 7
Opcode
0
PC<15:13>
3
7
5
8
54
0
PCLATH
8
15
PCH
8 7
PCL
0
DS30264A-page 52
Preliminary
漏
1997 Microchip Technology Inc.

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