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PIC17C752 Datasheet

  • PIC17C752

  • High-Performance 8-bit CMOS EPROM Microcontrollers with 10-b...

  • 3053.02KB

  • 304页

  • Microchip   Microchip

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PIC17C75X
FIGURE 13-3: TCON3 REGISTER (ADDRESS: 16h, BANK 7)
U-0
-
bit7
R-0
R-0
CA4OVF CA3OVF
R/W - 0 R/W - 0 R/W - 0 R/W - 0 R/W - 0
CA4ED1 CA4ED0 CA3ED1 CA3ED0 PWM3ON
bit0
bit 7:
bit 6:
Unimplemented:
Read as 鈥?鈥?/div>
R = Readable bit
W = Writable bit
U = Unimplemented bit,
Reads as 鈥?鈥?/div>
-n = Value at POR reset
CA4OVF:
Capture4 Over铿俹w Status bit
This bit indicates that the capture value had not been read from the capture register pair (CA4H:CA4L)
before the next capture event occurred. The capture register retains the oldest unread capture value (last
capture before over铿俹w). Subsequent capture events will not update the capture register with the TMR3
value until the capture register has been read (both bytes).
1 = Over铿俹w occurred on Capture4 registers
0 = No over铿俹w occurred on Capture4 registers
CA3OVF:
Capture3 Over铿俹w Status bit
This bit indicates that the capture value had not been read from the capture register pair (CA3H:CA3L)
before the next capture event occurred. The capture register retains the oldest unread capture value (last
capture before over铿俹w). Subsequent capture events will not update the capture register with the TMR3
value until the capture register has been read (both bytes).
1 = Over铿俹w occurred on Capture3 registers
0 = No over铿俹w occurred on Capture3 registers
bit 5:
bit 4-3:
CA4ED1:CA4ED0:
Capture4 Mode Select bits
00
= Capture on every falling edge
01
= Capture on every rising edge
10
= Capture on every 4th rising edge
11
= Capture on every 16th rising edge
bit 2-1:
CA3ED1:CA3ED0:
Capture3 Mode Select bits
00
= Capture on every falling edge
01
= Capture on every rising edge
10
= Capture on every 4th rising edge
11
= Capture on every 16th rising edge
bit 0:
PWM3ON:
PWM3 On bit
1 = PWM3 is enabled (The RG5/PWM3 pin ignores the state of the DDRG<5> bit)
0 = PWM3 is disabled (The RG5/PWM3 pin uses the state of the DDRG<5> bit for data direction)
漏
1997 Microchip Technology Inc.
Preliminary
DS30264A-page 93

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