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PIC17C752 Datasheet

  • PIC17C752

  • High-Performance 8-bit CMOS EPROM Microcontrollers with 10-b...

  • 3053.02KB

  • 304页

  • Microchip   Microchip

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PIC17C75X
13.1.3.3
EXTERNAL CLOCK SOURCE
The PWMs will operate regardless of the clock source
of the timer. The use of an external clock has rami铿乧a-
tions that must be understood. Because the external
TCLK12 input is synchronized internally (sampled once
per instruction cycle), the time TCLK12 changes to the
time the timer increments will vary by as much as 1T
CY
(one instruction cycle). This will cause jitter in the duty
cycle as well as the period of the PWM output.
This jitter will be
卤1T
CY
, unless the external clock is
synchronized with the processor clock. Use of one of
the PWM outputs as the clock source to the TCLK12
input, will supply a synchronized clock.
In general, when using an external clock source for
PWM, its frequency should be much less than the
device frequency (Fosc).
13.1.3.3.1 MAX RESOLUTION/FREQUENCY FOR
EXTERNAL CLOCK INPUT
The use of an external clock for the PWM time-base
(Timer1 or Timer2) limits the PWM output to a maxi-
mum resolution of 8-bits. The PWxDCL<7:6> bits must
be kept cleared. Use of any other value will distort the
PWM output. All resolutions are supported when inter-
nal clock mode is selected. The maximum attainable
frequency is also lower. This is a result of the timing
requirements of an external clock input for a timer (see
the Electrical Speci铿乧ation section). The maximum
PWM frequency, when the timers clock source is the
RB4/TCLK12 pin, as shown in Table 13-4 (standard
resolution mode).
TABLE 13-5:
Address
REGISTERS/BITS ASSOCIATED WITH PWM
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
Value on
POR,
BOR
0000 0000
0000 0000
-000 0000
xxxx xxxx
xxxx xxxx
TMR2IF
TMR2IE
T0IF
STKAV
TMR1IF
TMR1IE
INTF
GLINTD
CA2IF
CA2IE
PEIE
TO
CA1IF
CA1IE
T0CKIE
PD
TX1IF
TX1IE
T0IE
POR
RC1IF
RC1IE
INTE
BOR
0000 0010
0000 0000
0000 0000
--11 1100
xxxx xxxx
xxxx xxxx
鈥?/div>
TM2PW2
TM2PW3
DC7
DC7
DC7
鈥?/div>
鈥?/div>
鈥?/div>
DC6
DC6
DC6
鈥?/div>
鈥?/div>
鈥?/div>
DC5
DC5
DC5
鈥?/div>
鈥?/div>
鈥?/div>
DC4
DC4
DC4
鈥?/div>
鈥?/div>
鈥?/div>
DC3
DC3
DC3
鈥?/div>
鈥?/div>
鈥?/div>
DC2
DC2
DC2
xx-- ----
xx0- ----
xx0- ----
xxxx xxxx
xxxx xxxx
xxxx xxxx
Value on all
other
resets
(Note1)
0000 0000
0000 0000
-000 0000
uuuu uuuu
uuuu uuuu
0000 0010
0000 0000
0000 0000
--11 qq11
uuuu uuuu
uuuu uuuu
uu-- ----
uu0- ----
uu0- ----
uuuu uuuu
uuuu uuuu
uuuu uuuu
Name
16h, Bank 3
17h, Bank 3
16h, Bank 7
10h, Bank 2
11h, Bank 2
16h, Bank 1
17h, Bank 1
TCON1
TCON2
TCON3
TMR1
TMR2
PIR1
PIE1
CA2ED1
CA2OVF
鈥?/div>
CA2ED0
CA1OVF
CA4OVF
CA1ED1
PWM2ON
CA3OVF
CA1ED0
PWM1ON
CA4ED1
T16
TMR3CS
TMR2CS
TMR1CS
TMR1ON
PWM3ON
CA1/PR3 TMR3ON TMR2ON
CA4ED0
CA3ED1
CA3ED0
Timer1鈥檚 register
Timer2鈥檚 register
RBIF
RBIE
PEIF
鈥?/div>
TMR3IF
TMR3IE
T0CKIF
鈥?/div>
07h, Unbanked INTSTA
06h, Unbanked CPUSTA
14h, Bank 2
15h, Bank 2
10h, Bank 3
11h, Bank 3
10h, Bank 7
12h, Bank 3
13h, Bank 3
11h, Bank 7
PR1
PR2
PW1DCL
PW2DCL
PW3DCL
PW1DCH
PW2DCH
PW3DCH
Timer1 period register
Timer2 period register
DC1
DC1
DC1
DC9
DC9
DC9
DC0
DC0
DC0
DC8
DC8
DC8
Legend:
x
= unknown,
u
= unchanged,
-
= unimplemented read as '0',
q
= value depends on conditions,
shaded cells are not used by PWM Module.
Note 1: Other (non power-up) resets include: external reset through MCLR and WDT Timer Reset.
漏
1997 Microchip Technology Inc.
Preliminary
DS30264A-page 99

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