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PIC18F6720 Datasheet

  • PIC18F6720

  • 64/80-Pin High-Performance,256 Kbit to 1 Mbit Enhanced Flash...

  • 3274.08KB

  • 380页

  • Microchip   Microchip

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PIC18F6520/8520/6620/8620/6720/8720
TABLE 1-2:
Pin Name
PIC18FXX20 PINOUT I/O DESCRIPTIONS (CONTINUED)
Pin
PIC18F6X20 PIC18F8X20 Type
3
5
I/O
I/O
4
6
I/O
O
I/O
5
7
I/O
I
I/O
6
8
I/O
I/O
8
10
I/O
I/O
ST
ST
Digital I/O.
Capture5 input/Compare5 output/
PWM5 output.
ST
ST
Digital I/O.
Capture4 input/Compare4 output/
PWM4 output.
ST
ST
ST
Digital I/O.
USART 2 asynchronous receive.
USART 2 synchronous data
(see TX2/CK2).
ST
鈥?/div>
ST
Digital I/O.
USART 2 asynchronous transmit.
USART 2 synchronous clock
(see RX2/DT2).
ST
ST
Digital I/O.
Capture3 input/Compare3 output/
PWM3 output.
Pin Number
Buffer
Type
Description
PORTG is a bidirectional I/O port.
RG0/CCP3
RG0
CCP3
RG1/TX2/CK2
RG1
TX2
CK2
RG2/RX2/DT2
RG2
RX2
DT2
RG3/CCP4
RG3
CCP4
RG4/CCP5
RG4
CCP5
Legend:
TTL = TTL compatible input
CMOS = CMOS compatible input or output
ST = Schmitt Trigger input with CMOS levels
Analog = Analog input
I
= Input
O
= Output
P
= Power
OD
= Open-Drain (no P diode to V
DD
)
Note 1:
Alternate assignment for CCP2 when CCP2MX is not selected (all operating modes except
Microcontroller).
2:
Default assignment when CCP2MX is set.
3:
External memory interface functions are only available on PIC18F8X20 devices.
4:
CCP2 is multiplexed with this pin by default when configured in Microcontroller mode. Otherwise, it is
multiplexed with either RB3 or RC1.
5:
PORTH and PORTJ are only available on PIC18F8X20 (80-pin) devices.
6:
AV
DD
must be connected to a positive supply and AV
SS
must be connected to a ground reference for
proper operation of the part in user or ICSP modes. See parameter D001A for details.
DS39609B-page 18
铮?/div>
2004 Microchip Technology Inc.

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