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PIC18F6720 Datasheet

  • PIC18F6720

  • 64/80-Pin High-Performance,256 Kbit to 1 Mbit Enhanced Flash...

  • 3274.08KB

  • 380页

  • Microchip   Microchip

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PIC18F6520/8520/6620/8620/6720/8720
Example 8-3 shows the sequence to do a 16 x 16
unsigned multiply. Equation 8-1 shows the algorithm
that is used. The 32-bit result is stored in four registers,
RES3:RES0.
EQUATION 8-2:
16 x 16 SIGNED
MULTIPLICATION
ALGORITHM
EQUATION 8-1:
16 x 16 UNSIGNED
MULTIPLICATION
ALGORITHM
ARG1H:ARG1L
鈥?/div>
ARG2H:ARG2L
(ARG1H
鈥?/div>
ARG2H
鈥?/div>
2
16
) +
(ARG1H
鈥?/div>
ARG2L
鈥?/div>
2
8
) +
(ARG1L
鈥?/div>
ARG2H
鈥?/div>
2
8
) +
(ARG1L
鈥?/div>
ARG2L)
RES3:RES0
=
=
RES3:RES0
=
ARG1H:ARG1L
鈥?/div>
ARG2H:ARG2L
=
(ARG1H
鈥?/div>
ARG2H
鈥?/div>
2
16
) +
(ARG1H
鈥?/div>
ARG2L
鈥?/div>
2
8
) +
(ARG1L
鈥?/div>
ARG2H
鈥?/div>
2
8
) +
(ARG1L
鈥?/div>
ARG2L) +
(-1
鈥?/div>
ARG2H<7>
鈥?/div>
ARG1H:ARG1L
鈥?/div>
2
16
) +
(-1
鈥?/div>
ARG1H<7>
鈥?/div>
ARG2H:ARG2L
鈥?/div>
2
16
)
EXAMPLE 8-4:
MOVF
MULWF
MOVFF
MOVFF
;
MOVF
MULWF
MOVFF
MOVFF
;
MOVF
MULWF
MOVF
ADDWF
MOVF
ADDWFC
CLRF
ADDWFC
;
MOVF
MULWF
MOVF
ADDWF
MOVF
ADDWFC
CLRF
ADDWFC
;
BTFSS
BRA
MOVF
SUBWF
MOVF
SUBWFB
;
SIGN_ARG1
BTFSS
BRA
MOVF
SUBWF
MOVF
SUBWFB
;
CONT_CODE
:
16 x 16 SIGNED
MULTIPLY ROUTINE
; ARG1L * ARG2L ->
; PRODH:PRODL
;
;
EXAMPLE 8-3:
MOVF
MULWF
MOVFF
MOVFF
;
MOVF
MULWF
MOVFF
MOVFF
;
MOVF
MULWF
MOVF
ADDWF
MOVF
ADDWFC
CLRF
ADDWFC
;
MOVF
MULWF
MOVF
ADDWF
MOVF
ADDWFC
CLRF
ADDWFC
16 x 16 UNSIGNED
MULTIPLY ROUTINE
; ARG1L * ARG2L ->
; PRODH:PRODL
;
;
ARG1L, W
ARG2L
PRODH, RES1
PRODL, RES0
ARG1H, W
ARG2H
PRODH, RES3
PRODL, RES2
ARG1L, W
ARG2H
PRODL, W
RES1, F
PRODH, W
RES2, F
WREG
RES3, F
ARG1H, W
ARG2L
PRODL, W
RES1, F
PRODH, W
RES2, F
WREG
RES3, F
ARG2H, 7
SIGN_ARG1
ARG1L, W
RES2
ARG1H, W
RES3
ARG1L, W
ARG2L
PRODH, RES1
PRODL, RES0
ARG1H, W
ARG2H
PRODH, RES3
PRODL, RES2
ARG1L, W
ARG2H
PRODL, W
RES1, F
PRODH, W
RES2, F
WREG
RES3, F
ARG1H, W
ARG2L
PRODL, W
RES1, F
PRODH, W
RES2, F
WREG
RES3, F
; ARG1H * ARG2H ->
; PRODH:PRODL
;
;
; ARG1H * ARG2H ->
; PRODH:PRODL
;
;
;
;
;
;
;
;
;
;
;
;
;
;
;
;
;
;
;
ARG1L * ARG2H ->
PRODH:PRODL
Add cross
products
;
;
;
;
;
;
;
;
;
;
;
;
;
;
;
;
;
ARG1L * ARG2H ->
PRODH:PRODL
Add cross
products
ARG1H * ARG2L ->
PRODH:PRODL
Add cross
products
ARG1H * ARG2L ->
PRODH:PRODL
Add cross
products
Example 8-4 shows the sequence to do a 16 x 16
signed multiply. Equation 8-2 shows the algorithm
used. The 32-bit result is stored in four registers,
RES3:RES0. To account for the sign bits of the argu-
ments, each argument pairs鈥?Most Significant bit (MSb)
is tested and the appropriate subtractions are done.
; ARG2H:ARG2L neg?
; no, check ARG1
;
;
;
ARG1H, 7
CONT_CODE
ARG2L, W
RES2
ARG2H, W
RES3
; ARG1H:ARG1L neg?
; no, done
;
;
;
DS39609B-page 86
铮?/div>
2004 Microchip Technology Inc.

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