AD8045
APPLICATIONS
LOW DISTORTION PINOUT
The AD8045 LFCSP package features Analog Devices new low
distortion pinout. The new pinout provides two advantages
over the traditional pinout. First, improved second harmonic
distortion performance, which is accomplished by the physical
separation of the noninverting input pin and the negative power
supply pin. Second, the simplification of the layout due to the
dedicated feedback pin and easy routing of the gain set resistor
back to the inverting input pin. This allows a compact layout,
which helps to minimize parasitics and increase stability.
The traditional SOIC pinout has been slightly modified as well
to incorporate a dedicated feedback pin. Pin 1, previously a no
connect pin on the amplifier, is now a dedicated feedback pin. The
new pinout reduces parasitics and simplifies the board layout.
Existing applications that use the traditional SOIC pinout can
take full advantage of the outstanding performance offered by
the AD8045. An electrical insulator may be required if the SOIC
rests on the ground plane or other metal trace. This is covered
in more detail in the Exposed Paddle section of this data sheet.
In existing designs, which have Pin 1 tied to ground or to
another potential, simply lift Pin 1 of the AD8045 or remove the
potential on the Pin 1 solder pad. The designer does not need to
use the dedicated feedback pin to provide feedback for the
AD8045. The output pin of the AD8045 can still be used to pro-
vide feedback to the inverting input of the AD8045.
This dc-coupled differential driver is best suited for 卤5 V
operation in which optimum distortion performance is required
and the input signal is ground referenced.
511鈩?/div>
511鈩?/div>
AD8045
V
CML
鈥?V
IN
33鈩?/div>
V
INA
VIN
511鈩?/div>
511鈩?/div>
511鈩?/div>
511鈩?/div>
20pF
V
CML
+ V
IN
33鈩?/div>
V
INB
AD9244
AD8045
511鈩?/div>
511鈩?/div>
2.5k鈩?/div>
0.1碌F
100鈩?/div>
0.1碌F
1碌F
OP27
Figure 67. High Speed ADC Driver
The outputs of the AD8045s are centered about the AD9244鈥檚
common-mode range of 2.5 V. The common-mode reference
voltage from the AD9244 is buffered and filtered via the
OP27
and fed to the noninverting resistor network used in the level
shifting circuit.
The spurious-free dynamic range (SFDR) performance is
shown in Figure 68. Figure 69 shows a 50 MHz single-tone FFT
performance.
120
HIGH SPEED ADC DRIVER
When used as an ADC driver, the AD8045 offers results compa-
rable to transformers in distortion performance. Many ADC
applications require that the analog input signal be dc-coupled
and operate over a wide frequency range. Under these require-
ments, operational amplifiers are very effective interfaces to
ADCs. An op amp interface provides the ability to amplify and
level shift the input signal to be compatible with the input range
of the ADC. Unlike transformers, operational amplifiers can be
operated over a wide frequency range down to and including dc.
Figure 67 shows the AD8045 as a dc-coupled differential driver
for the
AD9244,
a 14-bit 65 MSPS ADC. The two amplifiers are
configured in noninverting and inverting modes. Both amplifi-
ers are set with a noise gain of +2 to provide better bandwidth
matching. The inverting amplifier is set for a gain of 鈥?, while
the noninverting is set for a gain of +2. The noninverting input
is divided by 2 in order to normalize its output and make it
equal to the inverting output.
100
AD8045
80
SFDR (dBc)
60
40
20
0
1
10
INPUT FREQUENCY (MHz)
100
Figure 68. SFDR vs. Frequency
Rev. A | Page 19 of 24
04814-0-067
04814-0-066
CML
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