您的位置：维库电子市场网 > Datasheet > CS8416-CS

CS8416-CS Datasheet

  • CS8416-CS

  • Cirrus Logic [192 kHZ DIGITAL AUDIO INTERFACE RECEIVER]

  • 764.03KB

  • CIRRUS

阅览下载 纠错 0

扫码查看芯片数据手册

上传产品规格书

PDF预览

CS8416
Frame 191
Frame 0
Frame 1
X
Channel A
Data
Y
Channel B
Data
Z
Channel A
Data
Y
Channel B
Data
X
Channel A
Data
Y
Channel B
Data
Preambles
OLRCK (in slave mode)
Figure 7. AES3 Data Format
If the user reads OSLIP as soon as the event trig-
gers, over a long period of time the rate of occur-
ring INT will be equal to the difference in
frequency between the input AES data and the
slave serial output LRCK. The CS8416 uses a hys-
teresis window when a slip/repeat event occurs.
The slip/repeat is triggered when an edge of OL-
RCK passes a window size from the beginning of
the Z/X preamble. Without the hysteresis window,
jitter on OLRCK with a frequency very close to Fs
could slip back and forth, causing multiple slip/re-
peat events. The CS8416 uses a hysteresis window
to ensure that only one slip/repeat happens even
with jitter on OLRCK.
master mode without the de-emphasis filter en-
gaged, the latency of the audio data will be 3
frames.
Fs (kHz)
32
44.1
48
64
96
192
Delay (ns)
96.6
78.6
74.6
60.6
50.6
TBD
Table 1. Delays by Frequency Values
4.2
AES11 Behavior
When OLRCK is configured as a master, the posi-
tive or negative edge of OLRCK (depending on the
setting of SOLRPOL in register 05h) will be within
-1.0%(1/Fs) to 1.1%(1/Fs) from the start of the pre-
amble X/Z. In master mode, the latency through the
part is dependent on the input sample frequency.
The delay through the part from the beginning of
the preamble to the active edge of OLRCK for the
various sample frequencies is given in
Table 1.
In
14
When OLRCK is configured as a slave any syn-
chronized input within +/-28%(1/Fs) from the pos-
itive or negative edge of OLRCK (depending on
the setting of SOLRPOL in register 05h) will be
treated as being sampled at the same time. Since the
CS8416 has no control of the OLRCK in slave
mode, the latency of the data through the part will
be a multiple of 1/Fs plus the delay between OL-
RCK and the preambles.
Both of these conditions are within the tolerance
range set forth in the AES11 standard.
DS578PP2

CS8416-CS PDF文件相关型号

CS8416-CZ

CS8416-CS相关型号PDF文件下载

您可能感兴趣的PDF文件资料

热门IC型号推荐

©2025 维库电子市场网（www.dzsc.com）　备案号：浙B2-20050339-1 经营许可证：浙B2-20210386版权声明
买家服务热线：0571-85317607 | 买家服务部QQ： QQ:1609526468
卖家服务热线：0571-85317607 | 卖家服务部QQ： QQ:331652727

扫码下载APP，
一键连接广大的电子世界。

在线人工客服

买家服务：
卖家服务：
技术客服：

0571-85317607

网站技术支持

13606545031

客服在线时间周一至周五
9:00-17:30

关注官方微信号，
第一时间获取资讯。

建议反馈
返回顶部

建议反馈

联系人：

联系方式：

按住滑块，拖拽到最右边
>>
感谢您向阿库提出的宝贵意见，您的参与是维库提升服务的动力！意见一经采纳，将有感恩红包奉上哦！

PDF纠错X

投诉电话：0571-85317607 投诉QQ：

如选匿名将无法为您反馈投诉结果，建议实名投诉！