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CS8416-CS Datasheet

  • CS8416-CS

  • Cirrus Logic [192 kHZ DIGITAL AUDIO INTERFACE RECEIVER]

  • 764.03KB

  • CIRRUS

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CS8416
6.3
General Purpose Outputs
Three General Purpose outputs are provided to allow the equipment designer flexibility in configuring the
CS8416.
Fourteen signals are available to be routed to the GPOs.
GPO pins may be configured to provide the following data:
Function
TX
EMPH
INT
C
U
RERR
NVERR
RCBL
96KHZ
AUDIO
VLRCK
GND
VDD
HRMCK
Code
0000
0001
0010
0011
0100
0101
0110
0111
1000
1001
1010
1011
1100
1101
Definition
AES/SPDIF input selected by TXSEL[2:0]
State of EMPH bit in incoming stream. Same polarity as EMPHb bit.
CS8416 interrupt
Channel status bit
User data bit
Receiver Error
Non-Validity Receiver Error
Receiver Channel Status Block
Input F
S
鈮?/div>
88.1
Non-audio indicator for decoded input stream
Virtual LRCK
Fixed low Level
VDD fixed high level
F
S
X 512 (Note
13)
Table 3. GPO Pin Configurations
Notes: 13. Frequency = 25 MHz Max, duty cycle not guaranteed, target duty cycle = 50% @ F
S
= 48 kHz.
Codes 1110 to 1111 - Reserved
6.4
Interrupts
The CS8416 has a comprehensive interrupt capa-
bility. The INT pin may be set to be active low, ac-
tive high or active low with no active pull-up
transistor. This last mode is used for active low,
wired-OR hook- ups, with multiple peripherals
connected to the microcontroller interrupt input
pin.
Many conditions can cause an interrupt, as listed in
the interrupt status register descriptions. Each
source may be masked off through mask register
bits. In addition, each source may be set to rising
edge, falling edge, or level sensitive. Combined
with the option of level sensitive or edge sensitive
modes within the microcontroller, many different
configurations are possible, depending on the
needs of the equipment designer.
22
DS578PP2

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