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CS4929 Datasheet

  • CS4929

  • Multi-Channel Digital Audio Decoders

  • 647.63KB

  • CIRRUS

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CS4923/4/5/6/7/8/9
FILT2鈥擯hase Locked Loop Filter: Pin 32
Connects to an external filter for the on-chip phase-locked loop. This pin does not meet Cirrus
Logic鈥檚 ESD tolerance of 2000 V using the human body model. This pin will tolerate ESD of
1000 V using the human body model.
CLKIN鈥擬aster Clock Input: Pin 30
CS4923/4/5/6/7/8/9 clock input. When in internal clock mode (CLKSEL == DGND), this input
is connected to the internal PLL from which all internal clocks are derived. When in external
clock mode (CLKSEL == VD), this input is connected to the DSP clock.
INPUT
CLKSEL鈥擠SP Clock Select: Pin 31
This pin selects the clock mode of the CS4923/4/5/6/7/8/9. When CLKSEL is low, CLKIN is
connected to the internal PLL from which all internal clocks are derived. When CLKSEL is
high CLKIN is connected to the DSP clock.
INPUT
DATA7, EMAD7, GPIO7鈥擯in 8
DATA6, EMAD6, GPIO6鈥擯in 9
DATA5, EMAD5, GPIO5鈥擯in 10
DATA4, EMAD4, GPIO4鈥擯in 11
DATA3, EMAD3, GPIO3鈥擯in 14
DATA2, EMAD2, GPIO2鈥擯in 15
DATA1, EMAD1, GPIO1鈥擯in 16
DATA0, EMAD0, GPIO0鈥擯in 17
In parallel host mode, these pins provide a bidirectional data bus. If a serial host mode is
selected, these pins can provide a multiplexed address and data bus for connecting an 8-bit
external memory. Otherwise, in serial host mode, these pins can act as general-purpose input or
output pins that can be individually configured and controlled by the DSP.
BIDIRECTIONAL - Default: INPUT
A0, SCCLK鈥擧ost Parallel Address Bit Zero or Serial Control Port Clock: Pin 7
In parallel host mode, this pin serves as one of two address input pins used to select one of four
parallel registers. In serial host mode, this pin serves as the serial control clock signal,
specifically as the SPI clock input or the I
2
C clock input.
INPUT
A1, SCDIN鈥擧ost Parallel Address Bit One or SPI Serial Control Data Input: Pin 6
In parallel host mode, this pin serves as one of two address input pins used to select one of four
parallel registers. In SPI serial host mode, this pin serves as the data input.
INPUT
RD, R/W, EMOE, GPIO11鈥擧ost Parallel Output Enable or Host Parallel R/W or External
Memory Output Enable or General Purpose Input & Output Number 11: Pin 5
In Intel parallel host mode, this pin serves as the active-low data bus enable input. In Motorola
parallel host mode, this pin serves as the read-high/write-low control input signal. In serial host
mode, this pin can serve as the external memory active-low data-enable output signal. Also in
serial host mode, this pin can serve as a general purpose input or output bit.
BIDIRECTIONAL - Default: INPUT
50
DS262F2

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