鈥?/div>
V
REF
to All
other I/Os in Bank
Differential
I/O Buffer
To Adjacent
I/O Pad
Table 10. Shared PTOE Segments
Device
ispXPLD 5256MX
ispXPLD 5512MX
ispXPLD 5768MX
MFBs Associated With Segments
(A, B, C, D) (E, F, G, H)
(A, B, C, D) (E, F, G, H)
(I, J, K, L) (M, N, O, P)
(A, B, C, D) (E, F, G, H)
(I, J, K, L) (M, N, O, P)
(Q, R, S, T) (U, V, W, Z)
(A, B, C, D) (E, F, G, H)
(I, J, K, L) (M, N, O, P)
(Q, R, S, T) (U, V, W, Z)
(Y, Z, AA, AB) (AC, AD, AE, AF)
ispXPLD 51024MX
sysIO Standards
Each I/O within a bank is individually con铿乬urable based on the V
CCO
and V
REF
settings. Some standards also
require the use of an external termination voltage. Table 12 lists the sysIO standards with the typical values for
V
CCO,
V
REF
and V
TT.
For more information on the sysIO capability, please refer to Lattice technical note number
TN1000,
sysIO Usage Guidelines for Lattice Devices,
available at www.latticesemi.com.
Table 11. Number of I/Os per Bank
Device
ispXPLD 5256MX
ispXPLD 5512MX
ispXPLD 5768MX
ispXPLD 51024MX
Maximum Number of I/Os per Bank (n)
36
68
96
96
18