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LC5256MC-5F256C Datasheet

  • LC5256MC-5F256C

  • Lattice Semiconductor [3.3V, 2.5V and 1.8V In-System Progra...

  • 427.20KB

  • LATTICE   LATTICE

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Lattice Semiconductor
ispXPLD 5000MX Family Data Sheet
ispXPLD 5000MX Family External Switching Characteristics
1, 2, 3
Over Recommended Operating Conditions
-4
Parameter
t
PD
t
PD_PTSA
t
S
t
S_PTSA
t
SIR
t
H
t
H_PTSA
t
HIR
t
CO
t
R
t
RW
t
LPTOE/DIS
t
SPTOE/DIS
t
GOE/DIS
t
CW
t
GW
t
WIR
t
SKEW
f
MAX
4
f
MAX
(Ext.)
f
MAX
(Tog.)
f
MAX
(CAMC)
5
f
MAX
(CAM)
5
Description
Data Propagation Delay,
5-PT Bypass
Data propagation delay
MFB Register Setup Time
Before Clock, 5-PT Bypass
MFB Register Setup Time
Before Clock
MFB Register Setup Time
Before Clock, Input Register
Path
MFB Register Hold Time
Before Clock, 5-PT Bypass
MFB Register Hold Time
Before Clock
MFB Register Hold Time
Before Clock, Input Register
Path
MFB Register Clock-to-Out-
put Delay
External Reset Pin to Output
Delay
Reset Pulse Duration
Input to Output Local Product
Term Output Enable/Disable
Input to Output Shared
Product Term Output Enable/
Disable
Global OE Input to Output
Enable/Disable
Clock Width, High or Low
Gate Width Low (for Low
Transparent) or High (for
High Transparent)
Input Register Clock Width,
High or Low
Clock-to-Out Skew, Block
Level
Clock Frequency with
Internal Feedback
Clock Frequency with
External Feedback,
1/ (t
S
+ t
CO
)
Clock Frequency Max.
Toggle
Clock Frequency to CAM
(Con铿乬ure Mode)
Clock Frequency to CAM
(Compare Mode)
Min.
鈥?/div>
鈥?/div>
2.2
2.5
1.0
0.0
0.0
0.5
鈥?/div>
鈥?/div>
1.8
鈥?/div>
鈥?/div>
鈥?/div>
1.5
1.5
1.5
鈥?/div>
鈥?/div>
鈥?/div>
鈥?/div>
鈥?/div>
鈥?/div>
Max.
4.0
4.8
鈥?/div>
鈥?/div>
鈥?/div>
鈥?/div>
鈥?/div>
鈥?/div>
2.8
4.0
鈥?/div>
6.0
6.0
4.5
鈥?/div>
鈥?/div>
鈥?/div>
0.6
300
200
333
280
150
-45
Min.
鈥?/div>
鈥?/div>
2.8
3.1
1.0
0.0
0.0
0.5
鈥?/div>
鈥?/div>
1.8
鈥?/div>
鈥?/div>
鈥?/div>
1.5
1.5
1.5
鈥?/div>
鈥?/div>
鈥?/div>
鈥?/div>
鈥?/div>
鈥?/div>
Max.
4.5
5.7
鈥?/div>
鈥?/div>
鈥?/div>
鈥?/div>
鈥?/div>
鈥?/div>
3.0
4.5
鈥?/div>
7.0
7.0
5.5
鈥?/div>
鈥?/div>
鈥?/div>
0.6
275
171
333
280
150
Min.
鈥?/div>
鈥?/div>
2.8
3.1
1.0
0.0
0.0
0.5
鈥?/div>
鈥?/div>
1.8
鈥?/div>
鈥?/div>
鈥?/div>
1.5
1.5
1.5
鈥?/div>
鈥?/div>
鈥?/div>
鈥?/div>
鈥?/div>
鈥?/div>
-5
Max.
5.0
6.0
鈥?/div>
鈥?/div>
鈥?/div>
鈥?/div>
鈥?/div>
鈥?/div>
3.2
5.0
鈥?/div>
7.5
7.5
5.5
鈥?/div>
鈥?/div>
鈥?/div>
0.6
250
166
333
230
150
-52
Min.
鈥?/div>
鈥?/div>
3.0
3.6
0.5
0.0
0.0
1.0
鈥?/div>
鈥?/div>
2.0
鈥?/div>
鈥?/div>
鈥?/div>
1.8
1.8
1.8
鈥?/div>
鈥?/div>
鈥?/div>
鈥?/div>
鈥?/div>
鈥?/div>
Max.
5.2
6.5
鈥?/div>
鈥?/div>
鈥?/div>
鈥?/div>
鈥?/div>
鈥?/div>
3.7
5.0
鈥?/div>
8.5
8.5
6.5
鈥?/div>
鈥?/div>
鈥?/div>
0.6
250
149
277
230
135
-75
Min.
鈥?/div>
鈥?/div>
4.5
5.5
1.7
0.0
0.0
1.3
鈥?/div>
鈥?/div>
3.0
鈥?/div>
鈥?/div>
鈥?/div>
2.5
2.5
2.5
鈥?/div>
鈥?/div>
鈥?/div>
鈥?/div>
鈥?/div>
鈥?/div>
Max. Units
7.5
9.5
鈥?/div>
鈥?/div>
鈥?/div>
鈥?/div>
鈥?/div>
鈥?/div>
5.0
7.5
鈥?/div>
10.5
10.5
7.5
鈥?/div>
鈥?/div>
鈥?/div>
1.0
150
105
200
168
90
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
MHz
MHz
MHz
MHz
MHz
29

LC5256MC-5F256C PDF文件相关型号

LC5512MC-45F256C,LC5512MC-45F484C,LC5512MC-45Q208C,LC5512MC-75F256C,LC5512MC-75F484C,LC5768MC-5F484C,LC5768MC-75F484C

LC5256MC-5F256C 产品属性

  • Lattice

  • CPLD - 复杂可编程逻辑器件

  • EEPROM/SRAM

  • 256

  • 160

  • 300 MHz

  • 4 ns

  • 100

  • 1.8 V

  • 16 mA

  • + 90 C

  • 0 C

  • FPBGA-256-100

  • SMD/SMT

  • Tube

  • 450

  • 1.95 V

  • 1.65 V

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