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LC5256MC-5F256C Datasheet

  • LC5256MC-5F256C

  • Lattice Semiconductor [3.3V, 2.5V and 1.8V In-System Progra...

  • 427.20KB

  • LATTICE   LATTICE

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Lattice Semiconductor
ispXPLD 5000MX Family Data Sheet
ispXPLD 5000MX Family Internal Switching Characteristics
Over Recommended Operating Conditions
Parameter
In/Out Delays
t
IN
t
GCLK_IN
t
RST
t
GOE
t
BUF
t
EN
t
DIS
Input Buffer Delay
Global Clock Input
Buffer Delay
Global RESET Pin
Delay
Global OE Pin
Delay
Delay through
Output Buffer
Output Enable Time
Output Disable
Time
Delay through SRP
Input Buffer to
Macrocell Register
Delay
Product Term
Sharing Array Delay
Internal Feedback
Delay
Global Clock Tree
Delay
Block PT Clock
Delay
Macrocell PT Clock
Delay
Programmable PLL
Delay Increment
Block PT Reset
Delay
Macrocell PT Set/
Reset Delay
Macrocell PT OE
Delay
Segment PT OE
Delay
Output Sharing
Array Delay
Global PT OE Delay
5-PT Bypass
Propagation Delay
Macrocell
Propagation Delay
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0.70
0.40
3.77
1.98
1.16
2.52
1.92
鈥?/div>
鈥?/div>
鈥?/div>
鈥?/div>
鈥?/div>
鈥?/div>
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0.91
0.35
4.24
2.66
1.30
2.84
2.40
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鈥?/div>
鈥?/div>
鈥?/div>
鈥?/div>
鈥?/div>
鈥?/div>
0.96
0.35
4.71
2.34
1.45
3.16
2.40
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鈥?/div>
鈥?/div>
鈥?/div>
鈥?/div>
鈥?/div>
鈥?/div>
1.11
0.35
4.71
2.87
1.60
3.63
2.40
鈥?/div>
鈥?/div>
鈥?/div>
鈥?/div>
鈥?/div>
鈥?/div>
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1.30
0.55
7.07
3.27
2.17
4.23
3.60
ns
ns
ns
ns
ns
ns
ns
Description
Base
Parameter
-4
-45
-5
-52
-75
Min. Max. Min. Max. Min. Max. Min. Max. Min. Max. Units
Routing Delays
t
ROUTE
t
INREG
t
PTSA
t
FBK
t
GCLK
t
BCLK
t
PTCLK
t
PLL_DELAY
t
BSR
t
PTSR
t
LPTOE
t
SPTOE
t
OSA
t
PTOE
t
PDB
t
PDI
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鈥?/div>
鈥?/div>
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鈥?/div>
鈥?/div>
鈥?/div>
鈥?/div>
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1.95
0.60
0.50
0.19
0.52
0.12
0.12
0.30
0.72
0.60
0.83
0.83
0.80
0.83
0.20
0.50
鈥?/div>
鈥?/div>
鈥?/div>
鈥?/div>
鈥?/div>
鈥?/div>
鈥?/div>
鈥?/div>
鈥?/div>
鈥?/div>
鈥?/div>
鈥?/div>
鈥?/div>
鈥?/div>
鈥?/div>
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2.06
0.60
0.50
0.02
0.32
0.14
0.14
0.30
0.81
0.75
1.19
1.19
0.90
1.04
0.23
0.93
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鈥?/div>
鈥?/div>
鈥?/div>
鈥?/div>
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2.34
0.60
0.53
0.39
0.72
0.15
0.15
0.30
0.90
0.75
1.04
1.04
1.00
1.04
0.25
0.72
鈥?/div>
鈥?/div>
鈥?/div>
鈥?/div>
鈥?/div>
鈥?/div>
鈥?/div>
鈥?/div>
鈥?/div>
鈥?/div>
鈥?/div>
鈥?/div>
鈥?/div>
鈥?/div>
鈥?/div>
鈥?/div>
2.24
0.47
0.83
0.03
0.82
0.15
0.15
0.30
0.94
0.75
1.52
1.52
1.00
1.04
0.25
0.72
鈥?/div>
鈥?/div>
鈥?/div>
鈥?/div>
鈥?/div>
鈥?/div>
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鈥?/div>
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3.66
1.63
1.34
0.60
0.78
0.23
0.23
0.30
1.35
1.13
1.31
1.31
1.50
1.56
0.38
1.04
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
32

LC5256MC-5F256C PDF文件相关型号

LC5512MC-45F256C,LC5512MC-45F484C,LC5512MC-45Q208C,LC5512MC-75F256C,LC5512MC-75F484C,LC5768MC-5F484C,LC5768MC-75F484C

LC5256MC-5F256C 产品属性

  • Lattice

  • CPLD - 复杂可编程逻辑器件

  • EEPROM/SRAM

  • 256

  • 160

  • 300 MHz

  • 4 ns

  • 100

  • 1.8 V

  • 16 mA

  • + 90 C

  • 0 C

  • FPBGA-256-100

  • SMD/SMT

  • Tube

  • 450

  • 1.95 V

  • 1.65 V

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