LM73
Logic Electrical Characteristics
DIGITAL DC CHARACTERISTICS
Unless otherwise noted, these specifications apply for V
DD
= 2.7V to 5.5V.
Boldface limits apply for T
A
= T
J
= T
MIN
to T
MAX
;
all other limits T
A
= T
J
= +25藲C, unless otherwise noted. T
A
is the ambient temperature. T
J
is the junction temperature.
Symbol
Parameter
Conditions
Typical
(Note 6)
SMBDAT, SMBCLK INPUTS
V
IH
V
IL
V
IN;HYST
I
IH
I
IL
C
IN
I
OH
V
OL
V
IH;ADDRESS
V
IL;ADDRESS
I
IH; ADDRESS
Logical 鈥?鈥?Input Voltage
Logical 鈥?鈥?Input Voltage
SMBDAT and SMBCLK Digital Input
Hysteresis
Logical 鈥?鈥?Input Current
Logical 鈥?鈥?Input Current
Input Capacitance
High Level Output Current
SMBus Low Level Output Voltage
Address Pin High Input Voltage
Address Pin Low Input Voltage
Address Pin High Input Current
V
IN
= V
DD
0.01
鈥?.01
V
OH
= V
DD
I
OL
= 3 mA
V
IN
= V
DD
V
IN
= 0 V
0.07*V
DD
0.01
鈥?.01
5
0.01
2
0.4
V
DD
minus 0.100
0.100
2
鈥?
2
鈥?
0.7*V
DD
0.3*V
DD
V (min)
V (max)
V
碌A (max)
碌A (max)
pF
碌A (max)
V (max)
V (min)
V (max)
碌A (max)
碌A (max)
Limits
(Note 7)
Units
(Limit)
SMBDAT, ALERT OUTPUTS
ADDRESS INPUT
I
IL;ADDRESS
Address Pin Low Input Current
V
IN
= 0 V
SMBus DIGITAL SWITCHING CHARACTERISTICS
Unless otherwise noted, these specifications apply for V
DD
= +2.7 V to +5.5 V, C
L
(load capacitance) on output lines = 400 pF.
Boldface limits apply for T
A
= T
J
= T
MIN
to T
MAX
;
all other limits T
A
= T
J
= +25藲C, unless otherwise noted.
Symbol
f
SMB
t
LOW
t
HIGH
t
F;SMBO
Parameter
SMBus Clock Frequency
SMBus Clock Low Time
SMBus Clock High Time
Output Fall Time (Note 10)
C
L
= 400 pF
I
PULL-UP
鈮?/div>
3 mA
Conditions
Typical
(Note 6)
Limits
(Note 7)
400
100
300
300
250
15
45
100
0
30
60
Units
(Limit)
kHz (max)
Hz (min)
ns (min)
ns (min)
ns (max)
ms (min)
ms (max)
ns (min)
ns (min)
ns (min)
ns (min)
t
TIMEOUT
SMBDAT and SMBCLK Time Low for Reset of
Serial Interface (Note 11)
t
SU;DAT
t
HD;DATI
Data In Setup Time to SMBCLK High
Data Hold Time: Data In Stable after SMBCLK
Low
t
HD;DATO
Data Hold Time: Data Out Stable after
SMBCLK Low
t
HD;STA
Start Condition SMBDAT Low to SMBCLK
Low (Start condition hold before the first clock
falling edge)
Stop Condition SMBCLK High to SMBDAT
Low (Stop Condition Setup)
SMBus Repeated Start-Condition Setup Time,
SMBCLK High to SMBDAT Low
SMBus Free Time Between Stop and Start
Conditions
Power-On Reset Time (Note 12)
t
SU;STO
t
SU;STA
t
BUF
t
POR
50
50
1.2
1
ns (min)
ns (min)
碌s (min)
ms (max)
5
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