MSP430F155IRTDR Datasheet

  • MSP430F155IRTDR

  • Texas Instruments [MIXED SIGNAL MICROCONTROLLER]

  • 1248.35KB

  • TI

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MSP430x15x, MSP430x16x, MSP430x161x
MIXED SIGNAL MICROCONTROLLER
SLAS368E 鈭?OCTOBER 2002 鈭?REVISED AUGUST 2006
electrical characteristics over recommended operating free-air temperature (unless otherwise
noted) (continued)
12-bit DAC, linearity specifications (see Figure 19)
PARAMETER
Resolution
Integral nonlinearity
(see Note 1)
TEST CONDITIONS
(12-bit Monotonic)
V
ref
= 1.5 V
DAC12AMPx = 7, DAC12IR = 1
V
ref
= 2.5 V
DAC12AMPx = 7, DAC12IR = 1
V
ref
= 1.5 V
DAC12AMPx = 7, DAC12IR = 1
V
ref
= 2.5 V
DAC12AMPx = 7, DAC12IR = 1
V
ref
= 1.5 V
DAC12AMPx = 7, DAC12IR = 1
V
ref
= 2.5 V
DAC12AMPx = 7, DAC12IR = 1
V
ref
= 1.5 V
DAC12AMPx = 7, DAC12IR = 1
V
ref
= 2.5 V
DAC12AMPx = 7, DAC12IR = 1
2.2V
卤2.0
卤2
0
3V
2.2V
卤0.4
卤0
4
3V
2.2V
卤21
3V
mV
2.2V
卤2.5
卤2
5
3V
卤1
0
卤1.0
LSB
卤8
0
卤8.0
LSB
V
CC
MIN
12
TYP
MAX
UNIT
bits
INL
DNL
Differential nonlinearity
(see Note 1)
E
O
Offset voltage w/o
calibration
(see Notes 1, 2)
Offset voltage with
calibration
(see Notes 1, 2)
d
E(O)
/d
T
Offset error
temperature coefficient
(see Note 1)
Gain error (see Note 1)
Gain temperature
coefficient (see Note 1)
2.2V/3V
V
REF
= 1.5 V
V
REF
= 2.5 V
2.2V
3V
2.2V/3V
DAC12AMPx=2
2.2V/3V
2.2V/3V
2.2V/3V
30
uV/C
E
G
d
E(G)
/d
T
卤3.50
卤3
50
10
100
32
6
% FSR
ppm of
FSR/掳C
t
Offset_Cal
Time for offset calibration
(see Note 3)
DAC12AMPx=3,5
DAC12AMPx=4,6,7
ms
NOTES: 1. Parameters calculated from the best-fit curve from 0x0A to 0xFFF. The best-fit curve method is used to deliver coefficients 鈥渁鈥?and
鈥渂鈥?of the first order equation: y = a + b*x. V
DAC12_xOUT
= E
O
+ (1 + E
G
) * (V
eREF+
/4095) * DAC12_xDAT, DAC12IR = 1.
2. The offset calibration works on the output operational amplifier. Offset Calibration is triggered setting bit DAC12CALON
3. The offset calibration can be done if DAC12AMPx = {2, 3, 4, 5, 6, 7}. The output operational amplifier is switched off with DAC12AMPx
={0, 1}. It is recommended that the DAC12 module be configured prior to initiating calibration. Port activity during calibration may
effect accuracy and is not recommended.
DAC V OUT
DAC Output
RLoad =
AV CC
2
CLoad = 100pF
Offset Error
Positive
Negative
Gain Error
DAC Code
VR+
Ideal transfer
function
Figure 19. Linearity Test Load Conditions and Gain/Offset Definition
POST OFFICE BOX 655303
鈥?/div>
DALLAS, TEXAS 75265
43

MSP430F155IRTDR PDF文件相关型号

MSP430F167IRTDR,MSP430X15X_08

MSP430F155IRTDR 产品属性

  • The Ultra-Low Power MSP430MSP430 OverviewMSP430 Design ToolsMSP430 PeripheralsMSP430x2xx/4xx and Wireless OverviewPortable Medical Solutions with MSP430MSP430 for Utility Metering SolutionsMSP430: How to JTAGMSP430, How To Use the Clock SystemGrace Software Graphical User InterfaceMCU OverviewDriver LibraryMSP430Ware Overview

  • 2,500

  • 集成电路 (IC)

  • 嵌入式 - 微控制器,

  • MSP430x1xx

  • RISC

  • 16-位

  • 8MHz

  • I²C,SPI,UART/USART

  • 欠压检测/复位,DMA,POR,PWM,WDT

  • 48

  • 16KB(16K x 8 + 256B)

  • 闪存

  • -

  • 512 x 8

  • 1.8 V ~ 3.6 V

  • A/D 8x12b,D/A 2x12b

  • 内部

  • -40°C ~ 85°C

  • 64-VFQFN 裸露焊盘

  • 带卷 (TR)

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