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Write Register 9
D7 D6 D5 D4 D3 D2 D1 D0
Write Register 9
D7 D6 D5 D4 D3 D2 D1 D0
VIS
NV
DLC
MIE
Status High/Status Low
Software INTACK Enable
0
0
1
1
0
1
0
1
No Reset
Channel Reset B
Channel Reset A
Force Hardware Reset
Write Register 13
D7 D6 D5 D4 D3 D2 D1 D0
Write Register 9
D7 D6 D5 D4 D3 D2 D1 D0
TC0
TC1
TC2
TC3
TC4
TC5
TC6
TC7
Lower Byte of
Time Constant
TC8
TC9
6-Bit/8-Bit Sync
Loop Mode
Abort/Flag on Underrun
Mark/Flag Idle
Go Active on Poll
TC10
TC11
TC12
TC13
TC14
TC15
Write Register 14
D7 D6 D5 D4 D3 D2 D1 D0
CRC Preset I/O
BR Generator Enable
Upper Byte of
Time Constant
0
0
1
1
0 NRZ
1 NRZI
0 FM1 (Transition = 1)
1 FM1 (Transition = 0)
Write Register 11
D7 D6 D5 D4 D3 D2 D1 D0
BR Generator Source
DTR/Request Function
Auto Echo
0
0
1
1
0
1
0
1
TRxC Out = Xtal Output
TRxC Out = Transmit Clock
TRxC Out = BR Generator Output
TRxC Out = DPLL Output
TRxC O/I
Local Loopback
0
0
0
0
1
1
1
1
0
0
1
1
0
0
1
1
0
1
0
1
0
1
0
1
Null Command
Enter Search Mode
Reset Missing Clock
Disable DPLL
Set Source = BR Generator
Set Source = RTxC
Set FM Mode
Set NRZI Mode
0
0
1
1
0
0
1
1
0 Transmit Clock = RTxC Pin
1 Transmit Clock = TRxC Pin
0 Transmit Clock = BR Generator Output
1 Transmit Clock = DPLL Output
Write Register 15
0 Receive Clock = RTxC Pin
1 Receive Clock = TRxC Pin
0 Receive Clock = BR Generator Output
1 Receive Clock = DPLL Output
RTxC Xtal/No Xtal
D7 D6 D5 D4 D3 D2 D1 D0
0
Zero Count IE
SDLC FIFO Enable
DCD IE
Sync/Hunt IE
CTS IE
Tx Underrun/EOM IE
Break/Abort IE
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36