256-Mbit J3 (x8/x16)
Figure 17. Protection Register Memory Map
Word
Address
0x88
A[24:1]: 256 Mbit
A[23:1]: 128 Mbit
A[22:1]: 64 Mbit
A[21:1]: 32 Mbit
64-bit Segment
(User-Programmable)
0x85
0x84
0x81
Lock Register 0
0x80
15 14 13 12 11 10
9
8
7
6
5
4
3
2
1
0
128-Bit Protection Register 0
64-bit Segment
(Factory-Programmed)
NOTE:
A0 is not used in x16 mode when accessing the Protection Register map (See
Table 8
for x16
addressing). For x8 mode A0 is used (See
Table 21
for x8 addressing).
Table 20. Word-Wide Protection Register Addressing
Word
LOCK
0
1
2
3
4
5
6
7
Use
Both
Factory
Factory
Factory
Factory
User
User
User
User
A8
1
1
1
1
1
1
1
1
1
A7
0
0
0
0
0
0
0
0
0
A6
0
0
0
0
0
0
0
0
0
A5
0
0
0
0
0
0
0
0
0
A4
0
0
0
0
0
0
0
0
1
A3
0
0
0
0
1
1
1
1
0
A2
0
0
1
1
0
0
1
1
0
A1
0
1
0
1
0
1
0
1
0
Table 21. Byte-Wide Protection Register Addressing (Sheet 1 of 2)
Byte
LOCK
LOCK
0
1
2
3
4
5
Use
Both
Both
Factory
Factory
Factory
Factory
Factory
Factory
A8
1
1
1
1
1
1
1
1
A7
0
0
0
0
0
0
0
0
A6
0
0
0
0
0
0
0
0
A5
0
0
0
0
0
0
0
0
A4
0
0
0
0
0
0
0
0
A3
0
0
0
0
0
0
0
0
A2
0
0
0
0
1
1
1
1
A1
0
0
1
1
0
0
1
1
A0
0
1
0
1
0
1
0
1
48
Datasheet