IDT5991A Datasheet

  • IDT5991A

  • PROGRAMMABLE SKEW PLL CLOCK DRIVER TURBOCLOCK

  • 68.62KB

  • 8页

  • IDT

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IDT5991A
PROGRAMMABLE SKEW PLL CLOCK DRIVER TURBOCLOCK
COMMERCIAL AND INDUSTRIAL TEMPERATURE RANGES
AC TIMING DIAGRAM
t
R EF
t
RPW H
RE F
t
R PW L
t
PD
FB
t
O DC V
t
O DC V
t
JR
Q
t
S KEW P R
t
SKEW 0, 1
OTH ER Q
t
SKE W P R
t
SKEW 0, 1
t
SKE W 2
INV ER TED Q
t
SKEW 2
t
SK EW 3, 4
t
SK EW 3, 4
REF D IVIDED B Y 2
t
SKEW 3, 4
t
SKEW 1, 3, 4
t
SKEW 2, 4
REF D IVIDED B Y 4
NOTES:
V
CCQ
/PE: The AC Timing Diagram applies to V
CCQ
/PE=V
DD
. For V
CCQ
/PE=GND, the negative edge of FB aligns with the negative edge of REF, divided outputs change on the
negative edge of REF, and the positive edges of the divide-by-2 and the divide-by-4 signals align.
Skew:
t
SKEWPR
:
t
SKEW0
:
t
DEV
:
t
ODCV
:
The time between the earliest and the latest output transition among all outputs for which the same t
U
delay has been selected when all are loaded with 50pF (30pF for
-2 and -5) and terminated with 50鈩?to 2.06V.
The skew between a pair of outputs (xQ
0
and xQ
1
) when all eight outputs are selected for 0t
U
.
The skew between outputs when they are selected for 0t
U.
The output-to-output skew between any two devices operating under the same conditions (V
CC
, ambient temperature, air flow, etc.)
The deviation of the output from a 50% duty cycle. Output pulse width variations are included in t
SKEW2
and t
SKEW4
specifications.
t
PWH
is measured at 2V.
t
PWL
is measured at 0.8V.
t
ORISE
and t
OFALL
are measured between 0.8V and 2V.
t
LOCK
:
The time that is required before synchronization is achieved. This specification is valid only after V
CC
is stable and within normal operating limits. This parameter is measured
from the application of a new signal or frequency at REF or FB until t
PD
is within specified limits.
7

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