output status.
鈭?/div>
RW = 鈥淟鈥? The data on DB0 to DB7 are latched at
the falling edge of the E signal.
Read enable clock input pin
When /RD is 鈥淟鈥? DB0 to DB7 are in an output status.
Description
E_RD
I
H
6800-series
E
L
8080-series
/RD
DB0
to
DB7
I/O
8-bit bi-directional data bus that is connected to the standard 8-bit microprocessor data
bus. When the serial interface selected (PS = "L");
鈭?/div>
DB0 to DB5: high impedance
鈭?/div>
DB6: serial input clock (SCLK)
鈭?/div>
DB7: serial input data (SID)
When chip select is not active, DB0 to DB7 may be high impedance.
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