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CR16MCS5VJI8 Datasheet

  • CR16MCS5VJI8

  • Family of 16-bit CAN-enabled CompactRISC Microcontrollers

  • 713.21KB

  • 156页

  • NSC

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6.1.1
Port Alternate Function Register
6.2
OPEN-DRAIN OPERATION
Each port that supports an alternate function (any port other
than Port B or Port C) has an alternate function register (Px-
ALT). This register determines whether the port pins are used
for general-purpose I/O or for the predetermined alternate
function. Each port pin can be controlled independently.
A bit cleared to 0 in the alternate function register causes the
corresponding pin to be used for general-purpose I/O. In this
configuration, the output buffer is controlled by the direction
register and the data output register. The input buffer is rout-
ed to the data input register. The input buffer is blocked ex-
cept when the buffer is actually being read.
A bit set to 1 in the alternate function register causes the cor-
responding pin to be used for its predetermined peripheral I/
O function. The output buffer data and TRI-STATE configura-
tion are controlled by signals coming from the on-chip periph-
eral device. The input buffer is enabled continuously in this
case. To minimize power consumption, the input signal
should be held within 0.2 volts of the VCC or GND voltage.
A reset operation clears the port alternate function registers
to 0, which programs the pins to operate as general-purpose
I/O ports. This register must be enabled before the corre-
sponding alternate function is enabled.
6.1.2
Port Direction Register
A port pin can be configured to operate as an inverting open-
drain output buffer. To do this, the CPU should clear the bit in
the data output register (PxDOUT) and then use the port di-
rection register (PxDIR) to set the value of the port pin. With
the direction register bit set to 1 (direction=out), the value
zero is forced on the pin. With the direction register bit
cleared to 0 (direction=in), the pin is placed in the TRI-STATE
mode. If desired, the internal weak pull-up can be enabled to
pull the signal high when the output buffer is in the TRI-
STATE mode.
The port direction register (PxDIR) determines whether each
port pin is used for input or for output. A bit cleared to 0 caus-
es the pin to operate as an input, which puts the output buffer
in the high-impedance state. A bit set to 1 causes the pin to
operate as an output, which enables the output buffer.
A reset operation clears the port direction registers to 0,
which programs the pins to operate as inputs.
6.1.3
Port Data Input Register
The data input register (PxDIN) is a read-only register that re-
turns the current state of each port pin. The CPU can read
this register at any time even when the pin is configured as
an output.
6.1.4
Port Data Output Register
The data output register (PxDOUT) holds the data to be driv-
en onto each port pin configured to operate as a general-pur-
pose output. In this configuration, writing to the register
changes the output value. Reading the register returns the
last value written to the register.
A reset operation leaves the register contents unchanged.
Upon power-up, the registers contain unknown values.
6.1.5
Port Weak Pull-Up Register
The weak pull-up register (PxWKPU) determines whether
each port pin uses a weak pull-up on the output buffer. A bit
set to 1 causes the weak pull-up to be used, while a bit
cleared to 0 causes the causes the weak pull-up not to be
used.
The pull-up device, if enabled by the register bit, operates in
the general-purpose I/O mode whenever the port output buff-
er is in the TRI-STATE mode. In the alternate function mode,
the pull-ups are always disabled.
A reset operation clears the port weak pull-up registers to 0,
which disables all pull-ups.
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