鈥?/div>
Modified Harvard architecture
C compiler optimized instruction set architecture
Flexible addressing modes
84 base instructions
24-bit wide instructions, 16-bit wide data path
Up to 144 Kbytes on-chip Flash program space
Up to 48K instruction words
Up to 8 Kbytes of on-chip data RAM
Up to 4 Kbytes of non-volatile data EEPROM
16 x 16-bit working register array
Up to 30 MIPs operation:
- DC to 40 MHz external clock input
- 4 MHz-10 MHz oscillator input with
PLL active (4x, 8x, 16x)
鈥?Up to 41 interrupt sources:
- 8 user selectable priority levels
- 5 external interrupt sources
- 4 processor traps
鈥?I
2
C鈩?module supports Multi-Master/Slave mode
and 7-bit/10-bit addressing
鈥?Two addressable UART modules with FIFO
buffers
鈥?Two CAN bus modules compliant with CAN 2.0B
standard
Analog Features:
鈥?12-bit Analog-to-Digital Converter (A/D) with:
- 100 Ksps conversion rate
- Up to 16 input channels
- Conversion available during Sleep and Idle
鈥?Programmable Low Voltage Detection (PLVD)
鈥?Programmable Brown-out Detection and Reset
generation
Special Microcontroller Features:
鈥?Enhanced Flash program memory:
- 10,000 erase/write cycle (min.) for
industrial temperature range, 100K (typical)
鈥?Data EEPROM memory:
- 100,000 erase/write cycle (min.) for
industrial temperature range, 1M (typical)
鈥?Self-reprogrammable under software control
鈥?Power-on Reset (POR), Power-up Timer (PWRT)
and Oscillator Start-up Timer (OST)
鈥?Flexible Watchdog Timer (WDT) with on-chip low
power RC oscillator for reliable operation
鈥?Fail-Safe Clock Monitor operation:
- Detects clock failure and switches to on-chip
low power RC oscillator
鈥?Programmable code protection
鈥?In-Circuit Serial Programming鈩?(ICSP鈩?
鈥?Selectable Power Management modes:
- Sleep, Idle and Alternate Clock modes
DSP Features:
鈥?Dual data fetch
鈥?Modulo and Bit-reversed modes
鈥?Two 40-bit wide accumulators with optional
saturation logic
鈥?17-bit x 17-bit single cycle hardware fractional/
integer multiplier
鈥?All DSP instructins are single cycle
- Multiply-Accumulate (MAC) operation
鈥?Single cycle 卤16 shift
Peripheral Features:
鈥?High current sink/source I/O pins: 25 mA/25 mA
鈥?Five 16-bit timers/counters; optionally pair up 16-
bit timers into 32-bit timer modules
鈥?16-bit Capture input functions
鈥?16-bit Compare/PWM output functions:
鈥?Data Converter Interface (DCI) supports common
audio Codec protocols, including I
2
S and AC鈥?7
鈥?3-wire SPI鈩?modules (supports 4 Frame modes)
CMOS Technology:
鈥?/div>
鈥?/div>
鈥?/div>
鈥?/div>
Low power, high speed Flash technology
Wide operating voltage range (2.5V to 5.5V)
Industrial and Extended temperature ranges
Low power consumption
铮?/div>
2004 Microchip Technology Inc.
Preliminary
DS70117C-page 1
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