A d v a n c e
I n f o r m a t i o n
AC Characteristics
Table 8.
Symbol
F
SCK
F
SCK
t
CRT
t
CFT
t
WH
t
WL
t
CS
t
CSS
(Note 3)
t
CSH
(Note 3)
t
HD
(Note 3)
t
CD
(Note 3)
t
HC
t
CH
t
V
t
HO
t
HD:DAT
t
SU:DAT
t
R
t
F
t
LZ
(Note 3)
t
HZ
(Note 3)
t
DIS
(Note 3)
t
WPS
(Note 3)
t
WPH
(Note 3)
t
RES
t
DP
t
W
t
PP
t
SE
t
BE
Parameter
SCK Clock Frequency READ instruction
SCK Clock Frequency for:
FAST_READ, PP, SE, BE, DP, RES, WREN,
WRDI, RDSR, WRSR
Clock Rise Time (Slew Rate)
Clock Fall Time (Slew Rate)
SCK High Time
SCK Low Time
CS# High Time
CS# Setup Time
CS# HOLD Time
HOLD# Setup Time (relative to SCK)
HOLD# Hold Time (relative to SCK)
HOLD# Setup Time (relative to SCK)
HOLD# Hold Time (relative to SCK)
Output Valid
Output Hold Time
Data in Hold Time
Data in Setup Time
Input Rise Time
Input Fall Time
HOLD# to Output Low Z
HOLD# to Output High Z
Output Disable Time
Write Protect Setup Time
Write Protect Hold Time
Release DP Mode
CS# High to Deep Power Down Mode
Write Status Register Time
Page Programming Time
Sector Erase Time
Bulk Erase Time
1.5 (Note 1)
0.5 (Note 1)
4 (Note 1)
20
100
3
3
20 (Note 2)
2 (Note 2)
0.8 (Note 2)
7 (Note 2)
0
5
5
5
5
9
9
9
AC Characteristics
Min
D.C.
D.C.
0.1
0.1
9
9
100
5
5
5
5
5
5
9
Typ
Max
33
50
Unit
MHz
MHz
V/ns
V/ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
碌s
碌s
ns
ms
sec
sec
Note:
1. Typical program and erase times assume the following conditions: 25C, VCC = 3.0V; 10, 000 cycles; checkerboard
data pattern
2. Under worst-case conditions of 90C; VCC = 2.7V; 100,000 cycles
3. Not 100% tested
June 28, 2004 S25FL004D_00A0
S25FL Family (Serial Peripheral Interface) S25FL004D
31