P R E L I M I N A R Y
Table 51.
Table 52.
Table 53.
Table 54.
Table 55.
Table 56.
Table 57.
Table 58.
Table 59.
Table 60.
Table 61.
Table 62.
Table 63.
Table 64.
Table 65.
Table 66.
Table 67.
Table 68.
Table 69.
Table 70.
Table 71.
Table 72.
Table 73.
Power-Up Sequencing ............................................................................................. 99
DRAM Memory Interface, Page Hit and Refresh Cycle ......................................... 102
DRAM First Cycle Read Access ............................................................................. 104
DRAM Bank/Page Miss Read Cycles .................................................................... 104
DRAM First Cycle Write Access ............................................................................. 106
DRAM Bank/Page Miss Write Cycles ..................................................................... 106
Local Bus Interface ................................................................................................. 108
Video RAM/LCD Interface ....................................................................................... 110
Power Management Control Signals ...................................................................... 110
PCMCIA Memory Read Cycle ................................................................................ 112
PCMCIA Memory Write Cycle ................................................................................ 114
PCMCIA I/O Read Cycle ........................................................................................ 116
PCMCIA I/O Write Cycle ........................................................................................ 118
BIOS ROM Read/Write 8-Bit Cycle ........................................................................ 120
DOS ROM Read/Write 8-Bit Cycle ......................................................................... 122
DOS ROM and Fast DOS ROM Read/Write 16-Bit Cycles .................................... 124
ISA Memory Read/Write 8-Bit Cycle ...................................................................... 126
ISA Memory Read/Write 16-Bit Cycle .................................................................... 128
ISA Memory Read/Write 0 Wait State Cycle .......................................................... 130
ISA I/O 8-Bit Read/Write Cycle .............................................................................. 132
ISA I/O 16-Bit Read/Write Cycle ............................................................................ 134
EPP Data Register Write Cycle .............................................................................. 136
EPP Data Register Read Cycle .............................................................................. 137
12
脡lan鈩C300 Microcontroller Data Sheet