ELANSC300-33KI Datasheet

  • ELANSC300-33KI

  • Highly Integrated, Low-Power, 32-Bit Microcontroller

  • 1344.13KB

  • 139页

  • AMD

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P R E L I M I N A R Y
Table 3. System Interface (Continued)
Signal Name
Pin No.
I/O
Type
O(I)
O(I)
O
O
O
O
O
O
O
O
STI
I [B]
I [B]
I [B]
O [B]
PU
Term
Drive
Type
B
B
B
B
B
C
C
C
C
A
鈥?/div>
C
C
C
C
Clock
Off
1
0
1
1
1
1
1
1
1
0
鈥?/div>
鈥?[0]
鈥?[0]
鈥?[0]
0[0]
Reset State (volts)
Internal
CGA
0.0
0.0
5.0
5.0
5.0
5.0
5.0
5.0
5.0
5.0
3.3
3.3
3.3
0.0
0.0
Local
Bus
0.0
0.0
5.0
5.0
5.0
5.0
5.0
5.0
5.0
5.0
3.3
3.3
3.3
0.0
0.0
Max
ISA
0.0
0.0
5.0
5.0
5.0
5.0
5.0
5.0
5.0
5.0
3.3
3.3
3.3
0.0
0.0
VSYS
VSYS
VSYS
VSYS
VSYS
VSYS
VSYS
VSYS
VSYS
VSYS
VCC1
VCC1
VCC1
VCC1
VSYS2
VCCIO
VCC
Clamp
VCC5
VCC5
VCC5
VCC5
VCC5
VCC5
VCC5
VCC5
VCC5
VCC5
VCC5
VCC5
VCC5
VCC5
VCC5
70
70
70
70
Spec.
Load
(pF)
30
30
30
30
30
50
50
50
50
30
AEN [TDI]
TC [TMS]
ENDIRL
ENDIRH
DBUFOE
IOR
IOW
MEMR
MEMW
RSTDRV
IOCHRDY
IOCS16 [LCDDL0]
MCS16 [LCDDL1]
IRQ14 [LCDDL2]
SBHE [LCDDL3]
47
49
50
51
59
54
55
56
57
58
192
196
197
198
143
Notes:
1. Reset State SYSCLK frequency is 4.6 MHz.
2. The drive strength for these pins is programmable. E is the default.
All inputs that have VCC clamp = 5 V are 5-V safe inputs regardless of their VCCIO.
脡lan鈩C300 Microcontroller Data Sheet
27

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