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ELANSC300-33KI Datasheet

  • ELANSC300-33KI

  • Highly Integrated, Low-Power, 32-Bit Microcontroller

  • 1344.13KB

  • 139页

  • AMD

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P R E L I M I N A R Y
TC [TMS]
PARALLEL PORT INTERFACE
ACK
Terminal Count (Output; Active High)
This signal is used to indicate that the transfer count for
the currently active DMA channel has reached zero,
and that the current DMA cycle is the last transfer.
This is a dual-function pin. When the JTAGEN signal is
asserted, it will function as the TMS, JTAG Test Mode
Select pin. See the 鈥淛TAG Boundary Scan Interface鈥?on
page 44 for more information on the function of this pin
during Test mode.
Printer Acknowledge (Input; Active Low)
The printer asserts ACK to confirm that the transfer
from the 脡lanSC300 microcontroller to the parallel port
was successful.
AFDT [X14OUT]
Auto Line Feed Detect (Output; Active Low)
This pin signals the printer to autofeed continuous form
paper. It can be programmed to become a 14.336-MHz
output.
BUSY
KEYBOARD INTERFACE
8042CS [XTDAT]
Printer Busy (Input; Active High)
The printer asserts BUSY when it is performing an
operation.
ERROR
Keyboard Controller Chip Select (Output; Active Low)
This signal is a decode of A9鈥揂0 = 060h to 06Eh, all
even addresses. In PC-compatible systems, it con-
nects to the external keyboard controller chip select.
XTDAT is the PC/XT keyboard data line.
A20GATE
(Input; Active Low)
The printer asserts the ERROR signal to inform the
parallel port of a deselect condition, PE, or other error
condition.
INIT [PCMCWE]
Address Bit-20 Gate (Input; Active High)
When deasserted, this signal is used to force CPU ad-
dress bit 20 Low, a function required for PC compatibil-
ity. In PC-compatible systems, this signal can be driven
by an 8042 keyboard controller, port 2, bit 1.
For detailed information about the A20GATE signal,
see the
脡lan
TM
SC300 and 脡lanSC310 Microcontrollers
GATEA20 Function Clarification Application Note,
order #21811.
RC
Initialize Printer (Output; Active Low)
This pin signals the printer to begin an initialization rou-
tine. It can be programmed to become the PCMCIA
write enable signal (PCMCWE).
PE
Paper End (Input; Active High)
The printer asserts this signal when it is out of paper.
PPDWE [PPDCS]
Reset CPU (Input; Active Low)
This signal resets the internal CPU. In PC-compatible
systems, this signal can be driven by a keyboard con-
troller, port 2, bit 0.
SYSCLK [XTCLK]
Parallel Port Write Enable (Output; Active Low)
The PPDWE signal is used to control the 374 type latch
in a unidirectional parallel port design. To support a bi-
directional parallel port design, this pin can be reconfig-
ured (PPDCS) to act as an address decode for the
parallel port data port. It can then be externally gated
with IOR and IOW to provide the Parallel Port Data
Read and Write Strobes, respectively. For more infor-
mation, see 鈥淧arallel Port鈥?on page 61.
PPOEN
System Clock (Output)
This clock can be used to provide a clock to a keyboard
controller. It is not synchronous to ISA bus cycles.
XTCLK is the PC/XT keyboard clock. For information
about internal clock states, see Table 23 on page 54.
For information about the maximum ISA bus option,
see page 65.
Parallel Port Output Buffer Enable
(Output; Active Low)
This signal supports a bidirectional parallel port design.
It is used to control the output enable of the Parallel
Port Output Buffer.
SLCT
Printer Select Return (Input; Active High)
The printer asserts SLCT when it has been selected.
脡lan鈩C300 Microcontroller Data Sheet
37

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