ELANSC300-33KI Datasheet

  • ELANSC300-33KI

  • Highly Integrated, Low-Power, 32-Bit Microcontroller

  • 1344.13KB

  • 139页

  • AMD

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P R E L I M I N A R Y
Table 15. Supported DRAM/SRAM Configuration
Bank Size
(16-Bit Wide Only)
Total DRAM/SRAM Size
512 Kbyte
512 Kbyte
1 Mbyte
1 Mbyte
1 Mbyte
1
2 Mbyte
1
2 Mbyte
1
2 Mbyte
4 Mbyte
1
4 Mbyte
8 Mbyte
1
16 Mbyte
1
Bank 0 DRAMs
4 256 K x 4 bits
1 256K x 16 bits
4 256 K x 4 bits
1 256K x 16 bits
2 512 K x 8 bits
2 512 K x 8 bits
4 1 M
byte
x 4 bits
1 1 M
byte
x 16 bits
4 1 M
byte
x 4 bits,
1 1 M
byte
x 16 bits
4 4 M
byte
x 4 bits
4 4 M
byte
x 4 bits
Bank 1 DRAMs
鈥?/div>
鈥?/div>
4 256 K x 4 bits
1 256K x 4 bits
鈥?/div>
2 512 K x 8 bits
鈥?/div>
鈥?/div>
4 1 M
byte
x 4 bits
1 1 M
byte
x 16 bits
鈥?/div>
4 4 M
byte
x 4 bits
Index B1h
Bit 7
0
0
0
0
x
x
x
1
x
1
x
x
Bit 6
0
0
1
1
x
x
x
0
x
1
x
x
Index
B4h
Bit 7
1
1
1
1
0
0
0
1
0
1
0
0
Index Reg. 66h
MS2
Bit 4
x
x
x
x
0
0
0
x
1
x
1
1
MS1
Bit 3
x
x
x
x
0
1
1
x
0
x
0
1
MS0
Bit 2
x
x
x
x
1
0
1
x
0
x
1
0
Notes:
1. SRAM configuration is supported. Bit 7 of the PCMCIA Card Reset Register, Index B4h, must be cleared. Setting MS2鈥揗S0
of Index 66h as specified in the table selects the SRAM bank sizes.
See Tables 16 and 17 for the DRAM address multiplexing schemes for normal page mode and Enhanced Page mode, respec-
tively.
脡lan鈩C300 Microcontroller Data Sheet
47

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