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ELANSC300-33KI Datasheet

  • ELANSC300-33KI

  • Highly Integrated, Low-Power, 32-Bit Microcontroller

  • 1344.13KB

  • 139页

  • AMD

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P R E L I M I N A R Y
ALTERNATE PIN FUNCTIONS SELECTED VIA FIRMWARE
The following tables contain brief descriptions of the alternate pin functions/names and the pin names of the default
function that the alternate function replaces. These alternate functions are selected via system firmware only.
SRAM Interface
This alternate function is configured by setting bit 0 of the Miscellaneous 6 Register, Index 70h.
Table 30.
SRAM Pin Name
[SRCS0]
[SRCS1]
[SRCS2]
[SRCS3]
Pin Type
O
O
O
O
SRAM Interface
Default Pin
Name/Function
CAS0L
CAS0H
CAS1L
CAS1H
Pin No.
6
7
4
5
SRAM Interface Pin
Description/Notes
SRAM Bank 0 Chip Select. Low Byte
SRAM Bank 0 Chip Select. High Byte
SRAM Bank 1 Chip Select. Low Byte
SRAM Bank 1 Chip Select. High Byte
Dual-Scan LCD Data Bus
This alternate function is configured via selecting a dual-scan LCD Panel mode in the CGA index address space at
Index 18h.
Table 31.
Dual-Scan Pin Name
[LCDDL0]
[LCDDL1]
[LCDDL2]
[LCDDL3]
Pin Type
O
O
O
O
Dual-Scan LCD Data Bus
Default Pin
Name/Function
IOCS16
MCS16
IRQ14
SBHE
Pin No.
196
197
198
143
Dual-Scan LCD Data-Bus Pin
Description/Notes
Dual screen data bit
Dual screen data bit
Dual screen data bit
Dual screen data bit
Notes:
In the dual-scan LCD configuration, IOCS16 and MCS16 are internally forced inactive.
Unidirectional/Bidirectional Parallel Port
This alternate function is configured via selecting either the Normal Bidirectional mode configuration or the EPP
mode configuration for the parallel port in the Function Enable 1 Register, Index B0h.
Table 32.
Bidirectional Pin Pin Type
Name
[PPDCS]
O
Bidirectional Parallel Port Pin Description
Bidirectional Parallel Port Pin
Description/Notes
Default Pin
Name/Function
PPDWE
Pin No.
90
Parallel Port data register address decode
脡lan鈩C300 Microcontroller Data Sheet
71

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