M28W320EB-ZB Datasheet

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M28W320EBT, M28W320EBB

STATUS REGISTER

The Status Register provides information on the

current or previous Program or Erase operation.

The various bits convey information and errors on

the operation. To read the Status register the

Read Status Register command can be issued, re-

fer to the Read Status Register Command section.

To output the contents, the Status Register is

latched on the falling edge of the Chip Enable or

Output Enable signals, and can be read until Chip

Enable or Output Enable returns to V

IH

. Either

Chip Enable or Output Enable must be toggled to

update the latched data.

Bus Read operations from any address always

read the Status Register during Program and

Erase operations.

The bits in the Status Register are summarized in

Table 8, Status Register Bits. Refer to Table 8 in

conjunction with the following text descriptions.

Program/Erase Controller Status (Bit 7).

The Pro-

gram/Erase Controller Status bit indicates whether

the Program/Erase Controller is active or inactive.

When the Program/Erase Controller Status bit is

Low (set to 鈥?鈥?, the Program/Erase Controller is

active; when the bit is High (set to 鈥?鈥?, the Pro-

gram/Erase Controller is inactive, and the device

is ready to process a new command.

The Program/Erase Controller Status is Low im-

mediately after a Program/Erase Suspend com-

mand is issued until the Program/Erase Controller

pauses. After the Program/Erase Controller paus-

es the bit is High .

During Program, Erase, operations the Program/

Erase Controller Status bit can be polled to find the

end of the operation. Other bits in the Status Reg-

ister should not be tested until the Program/Erase

Controller completes the operation and the bit is

High.

After the Program/Erase Controller completes its

operation the Erase Status, Program Status, V

PP

Status and Block Protection Status bits should be

tested for errors.

Erase Suspend Status (Bit 6).

The Erase Sus-

pend Status bit (set to 鈥?鈥? indicates that an Erase

operation has been suspended or is going to be

suspended.

The Erase Suspend Status should only be consid-

ered valid when the Program/Erase Controller Sta-

tus bit is High (Program/Erase Controller inactive).

Bit 7 is set within 30碌s of the Program/Erase Sus-

pend command being issued therefore the memo-

ry may still complete the operation rather than

entering the Suspend mode.

When a Program/Erase Resume command is is-

sued the Erase Suspend Status bit returns Low.

memory may still complete the operation rather

16/45

Erase Status (Bit 5).

The Erase Status bit can be

used to identify if the memory has failed to verify

that the block has erased correctly. When the

Erase Status bit is High (set to 鈥?鈥?, the Program/

Erase Controller has applied the maximum num-

ber of pulses to the block and still failed to verify

that the block has erased correctly. The Erase Sta-

tus bit should be read once the Program/Erase

Controller Status bit is High (Program/Erase Con-

troller inactive).

Once set High, the Erase Status bit can only be re-

set Low by a Clear Status Register command or a

hardware reset. If set High it should be reset be-

fore a new Program or Erase command is issued,

otherwise the new command will appear to fail.

Program Status (Bit 4).

The Program Status bit

is used to identify a Program failure. When the

Program Status bit is High (set to 鈥?鈥?, the Pro-

gram/Erase Controller has applied the maximum

number of pulses to the byte and still failed to ver-

ify that it has programmed correctly. The Program

Status bit should be read once the Program/Erase

Controller Status bit is High (Program/Erase Con-

troller inactive).

Once set High, the Program Status bit can only be

reset Low by a Clear Status Register command or

a hardware reset. If set High it should be reset be-

fore a new command is issued, otherwise the new

command will appear to fail.

V

PP

Status (Bit 3).

The V

PP

Status bit can be

used to identify an invalid voltage on the V

PP

pin

during Program and Erase operations. The V

PP

pin is only sampled at the beginning of a Program

or Erase operation. Indeterminate results can oc-

cur if V

PP

becomes invalid during an operation.

When the V

PP

Status bit is Low (set to 鈥?鈥?, the volt-

age on the V

PP

pin was sampled at a valid voltage;

when the V

PP

Status bit is High (set to 鈥?鈥?, the V

PP

pin has a voltage that is below the V

PP

Lockout

Voltage, V

PPLK

, the memory is protected and Pro-

gram and Erase operations cannot be performed.

Once set High, the V

PP

Status bit can only be reset

Low by a Clear Status Register command or a

hardware reset. If set High it should be reset be-

fore a new Program or Erase command is issued,

otherwise the new command will appear to fail.

Program Suspend Status (Bit 2).

The Program

Suspend Status bit (set to 鈥?鈥? indicates that a Pro-

gram operation has been suspended or is going to

be suspended.

The Program Suspend Status should only be con-

sidered valid when the Program/Erase Controller

Status bit is High (Program/Erase Controller inac-

tive). Bit 2 is set within 5碌s of the Program/Erase

Suspend command being issued therefore the

than

entering

the

Suspend

mode.

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