CS98200
Next Generation DVD Processor
74
NV_CE_N
O
ROM/NVRAM Chip Enable.
Table 16. ROM/NVRAM Interface (Continued)
8.3
Video Output Interface Pins
This is the interface to a video encoder chip that will send the CS98200 video signals to a TV. See
Table 17.
This interface uses the same pins of the Video Input Interface, so you are not able to use
Video Input (primary) and Video Output (Secondary) at the same time. .
Pin
131s
129s
128s
57s, 58s, 59s,
60s, 102s, 103s,
104s, 106s
Signal Name
VOUT_CLK
VOUT_HS
VOUT_VS
VOUT_D[7:0]
Type
O
O
O
O
27 Mhz Clock Output.
Horizontal Sync. Output when the CS98200 is the video
master, input when the video encoder is master.
Vertical Sync. Output when the CS98200 is the video mas-
ter, input when the video encoder is master.
Video Data Output[7:0] in Cb, Y, Cr, Y format.
Description
Table 17. Video Output Interface
8.4
Video Input Interface Pins
See
Table 18.
Pin
131
128
129
57, 58, 59, 60,
102, 103, 104,
106
Signal Name
VIN_CLK
VIN_VS
VIN_HS
VIN_D [7:0]
Type
I
I
I
I
Video Input Clock.
Video Input Vertical Sync.
Video Input Horizontal Sync.
Video Data Input[7:0] in Cb, Y, Cr, Y format.
Description
Table 18. Video Input Interface
50
铮?/div>
Copyright 2002 Cirrus Logic (All Rights Reserved)
DS581PP2
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