鈩?/div>
compatible
鈥?Schmitt trigger inputs for noise suppression
鈥?Output slope control to eliminate ground bounce
鈥?100 kHz (2.5V) and 400 kHz (5V) compatibility
鈥?Self-timed write cycle (including auto-erase)
鈥?Page-write buffer for up to 16 bytes
鈥?2 ms typical write cycle time for page-write
鈥?Hardware write protect for entire memory
鈥?Can be operated as a serial ROM
鈥?Factory programming (QTP) available
鈥?ESD protection > 4,000V
鈥?10,000,000 erase/write cycles guaranteed
鈥?Data retention > 200 years
鈥?8-pin DIP, 8-lead or 14-lead SOIC packages
鈥?Available for extended temperature ranges
- Commercial (C):
0
掳
C to +70
掳
C
- Industrial (I):
-40
掳
C to +85
掳
C
PACKAGE TYPES
PDIP
A0
A1
A2
V
SS
1
24LC16B
2
3
4
8
7
6
5
V
CC
WP
SCL
SDA
SOIC
A0
A1
A2
V
SS
14-lead
SOIC
1
24LC16B
8
7
6
5
V
CC
WP
SCL
SDA
2
3
4
NC
A0
A1
NC
A2
V
SS
NC
1
2
14
13
NC
V
CC
WP
NC
SCL
SDA
NC
24LC16B
3
4
5
6
7
12
11
10
9
8
DESCRIPTION
The Microchip Technology Inc. 24LC16B is a 16K bit
Electrically Erasable PROM. The device is organized
as eight blocks of 256 x 8 bit memory with a 2-wire
serial interface. Low voltage design permits operation
down to 2.5 volts with standby and active currents of
only 5
碌
A and 1 mA respectively. The 24LC16B also
has a page-write capability for up to 16 bytes of data.
The 24LC16B is available in the standard 8-pin DIP and
both 8-lead and 14-lead surface mount SOIC pack-
ages.
BLOCK DIAGRAM
WP
HV GENERATOR
I/O
CONTROL
LOGIC
MEMORY
CONTROL
LOGIC
XDEC
EEPROM
ARRAY
PAGE LATCHES
SDA
SCL
YDEC
V
CC
V
SS
SENSE AMP
R/W CONTROL
I
2
C is a trademark of Philips Corporation.
漏
1996 Microchip Technology Inc.
DS20070G-page 1
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