74ALVC14
Hex inverting Schmitt trigger
Rev. 03 鈥?15 February 2005
Product data sheet
1. General description
The 74ALVC14 is a high-performance, low-power, low-voltage, Si-gate CMOS device and
superior to most advanced CMOS compatible TTL families.
The 74ALVC14 provides six inverting buffers with Schmitt-trigger action. It is capable of
transforming slowly changing input signals into sharply de铿乶ed, jitter-free output signals.
2. Features
s
s
s
s
s
s
s
s
Wide supply voltage range from 1.65 V to 3.6 V
3.6 V tolerant inputs/outputs
CMOS low power consumption
Direct interface with TTL levels (2.7 V to 3.6 V)
Power-down mode
Unlimited input rise and fall times
Latch-up performance exceeds 250 mA
Complies with JEDEC standard:
x
JESD8-7 (1.65 V to 1.95 V)
x
JESD8-5 (2.3 V to 2.7 V)
x
JESD8-B/JESD36 (2.7 V to 3.6 V)
s
ESD protection:
x
HBM EIA/JESD22-A114-B exceeds 2000 V
x
MM EIA/JESD22-A115-A exceeds 200 V
s
Multiple package options
3. Quick reference data
Table 1:
Symbol
Quick reference data
Parameter
Conditions
V
CC
= 1.8 V; C
L
= 30 pF;
R
L
= 1 k鈩?/div>
V
CC
= 2.5 V; C
L
= 30 pF;
R
L
= 500
鈩?/div>
V
CC
= 2.7 V; C
L
= 50 pF;
R
L
= 500
鈩?/div>
V
CC
= 3.3 V; C
L
= 50 pF;
R
L
= 500
鈩?/div>
Min
-
-
-
-
Typ
2.9
2.2
2.8
2.4
Max
-
-
-
-
Unit
ns
ns
ns
ns
t
PHL
, t
PLH
propagation delay nA
to nY
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