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AD6654 Datasheet

  • AD6654

  • 14-Bit, 92.16 MSPS, 4-/6-Channel Wideband IF to Baseband Rec...

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  • 90页

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14-Bit, 92.16 MSPS, 4-/6-Channel
Wideband IF to Baseband Receiver
AD6654
FEATURES
SNR = 90 dB in 1.25 MHz bandwidth to Nyquist
SNR = 87 dB in 1.25 MHz bandwidth to 200 MHz
Integrated 14-bit, 92.16 MSPS ADC
IF sampling frequencies to 200 MHz
Internal 2.4 V reference, 2.2 V p-p analog input range
Internal differential track-and-hold analog input
Processes 4/6 wideband carriers simultaneously
Fractional clock multiplier to 200 MHz
Programmable decimating FIR filters, interpolating
half-band filters and programmable AGC loops
with 96 dB range
Three 16-bit configurable parallel output ports
User-configurable built-in self-test (BIST) capability
8-/16-bit microport and SPORT/SPI庐 serial port control
APPLICATIONS
Multicarrier, multimode digital receivers
GSM, EDGE, PHS, UMTS, WCDMA, CDMA2000,
TD-SCDMA, WiMAX
Micro and pico cell systems, software radios
Wireless local loop
Smart antenna systems
In-building wireless telephony
Broadband data applications
Instrumentation and test equipment
FUNCTIONAL BLOCK DIAGRAM
14-BIT ADC FRONT END
ENC+
ENC鈥?/div>
AIN+
AIN鈥?/div>
V
REF
2.4V
V
REF
PRN
GEN
3
EXP
BITS
PEAK/
RMS
MSMT
4-CHANNEL AND 6-CHANNEL DIGITAL DOWN CONVERTER
NCO
CIC5
M = 1鈥?2
CIC5
M = 1鈥?2
CIC5
M = 1鈥?2
CIC5
M = 1鈥?2
CIC5
M = 1鈥?2
CIC5
M = 1鈥?2
FIR1
HB1
M = BYP, 2
FIR1
HB1
M = BYP, 2
FIR1
HB1
M = BYP, 2
FIR1
HB1
M = BYP, 2
FIR1
HB1
M = BYP, 2
FIR1
HB1
M = BYP, 2
FIR2
HB2
M = BYP, 2
FIR2
HB2
M = BYP, 2
FIR2
HB2
M = BYP, 2
FIR2
HB2
M = BYP, 2
FIR2
HB2
M = BYP, 2
FIR2
HB2
M = BYP, 2
MRCF
DRCF
M = 1鈥?6
MRCF
DRCF
M = 1鈥?6
MRCF
DRCF
M = 1鈥?6
MRCF
DRCF
M = 1鈥?6
MRCF
DRCF
M = 1鈥?6
MRCF
DRCF
M = 1鈥?6
INTERNAL
TIMING
14
SHA
ADC
INPUT
MATRIX
DATA ROUTER MATRIX
NCO
CRCF
M = 1鈥?6
CRCF
M = 1鈥?6
CRCF
M = 1鈥?6
CRCF
M = 1鈥?6
CRCF
M = 1鈥?6
LHB
L = 1, 2
LHB
L = 1, 2
LHB
L = 1, 2
LHB
L = 1, 2
LHB
L = 1, 2
DATA ROUTING
AGC
CRCF
M = 1鈥?6
LHB
L = 1, 2
PA
NCO
PB
NCO
PARALLEL PORTS
OVR
(ADC OVERRANGE)
EXP
(VGA LEVEL CONTROL)
PC
NCO
M = DECIMATION
L = INTERPOLATION
AVDD, DRVDD,
VDDCORE, VDDIO, GND
SYNC
0, 1, 2, 3
CLOCK
MULTIPLIER
8-BIT/16-BIT MICROPORT
INTERFACE
SPORT/
SPI INTERFACE
Figure 1.
Rev. 0
Information furnished by Analog Devices is believed to be accurate and reliable.
However, no responsibility is assumed by Analog Devices for its use, nor for any
infringements of patents or other rights of third parties that may result from its use.
Specifications subject to change without notice. No license is granted by implication
or otherwise under any patent or patent rights of Analog Devices. Trademarks and
registered trademarks are the property of their respective owners.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781.329.4700
www.analog.com
Fax: 781.461.3113
漏2005 Analog Devices, Inc. All rights reserved.
05156-001
(AVAILABLE IN
6-CHANNEL MODEL ONLY)
NCO

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