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AD7685 Datasheet

  • AD7685

  • 3mW, 100kSPS, 14-Bit ADC in 6-Lead SOT-23

  • 1836.00KB

  • 30页

  • AD

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3 mW, 100 kSPS,
14-Bit ADC in 6-Lead SOT-23
AD7940
FEATURES
Fast throughput rate: 100 kSPS
Specified for V
DD
of 2.5 V to 5.5 V
Low power
4 mW typ at 100 kSPS with 3 V supplies
17 mW typ at 100 kSPS with 5 V supplies
Wide input bandwidth:
81 dB SINAD at 10 kHz input frequency
Flexible power/serial clock speed management
No pipeline delays
High speed serial interface
SPI庐/QSPI鈩?MICROWIRE鈩?DSP compatible
Standby mode: 0.5 碌A max
6-Lead SOT-23 and 8-Lead MSOP packages
FUNCTIONAL BLOCK DIAGRAM
V
DD
V
IN
T/H
14-BIT SUCCESSIVE
APPROXIMATION
ADC
SCLK
AD7940
CONTROL
LOGIC
SDATA
CS
03305-0-001
GND
Figure 1.
Table 1. 16-Bit and 14-Bit ADC (MSOP and SOT-23)
Type
16-Bit True Differential
16-Bit Pseudo Differential
16-Bit Unipolar
14-Bit True Differential
14-Bit Pseudo Differential
14-Bit Unipolar
100 kSPS
AD7684
AD7683
AD7680
250 kSPS
AD7687
AD7685
AD7944
AD7942
AD7940
500 kSPS
AD7688
AD7686
AD7947
AD7946
APPLICATIONS
Battery-powered systems
Personal digital assistants
Medical instruments
Mobile communications
Instrumentation and control systems
Remote data acquisition systems
GENERAL DESCRIPTION
The AD7940
1
is a 14-bit, fast, low power, successive approxima-
tion ADC. The part operates from a single 2.50 V to 5.5 V power
supply and features throughput rates up to 100 kSPS. The part
contains a low noise, wide bandwidth track-and-hold amplifier
that can handle input frequencies in excess of 7 MHz.
The conversion process and data acquisition are controlled
using CS and the serial clock, allowing the devices to interface
with microprocessors or DSPs. The input signal is sampled on
the falling edge of CS and the conversion is also initiated at this
point. There are no pipelined delays associated with the part.
The AD7940 uses advanced design techniques to achieve very
low power dissipation at fast throughput rates. The reference for
the part is taken internally from V
DD
, which allows the widest
dynamic input range to the ADC. Thus, the analog input range
for this part is 0 V to V
DD
. The conversion rate is determined by
the SCLK frequency.
This part features a standard successive approximation ADC
with accurate control of the sampling instant via a CS input and
once off conversion control.
PRODUCT HIGHLIGHTS
1.
2.
3.
First 14-bit ADC in a SOT-23 package.
High throughput with low power consumption.
Flexible power/serial clock speed management. The con-
version rate is determined by the serial clock, allowing the
conversion time to be reduced through the serial clock
speed increase. This allows the average power consumption
to be reduced when a power-down mode is used while not
converting. The part also features a shutdown mode to
maximize power efficiency at lower throughput rates.
Power consumption is 0.5 碌A max when in shutdown.
Reference derived from the power supply.
No pipeline delay.
4.
5.
1
Protected by U.S. Patent No. 6,681,332.
Rev. 0
Information furnished by Analog Devices is believed to be accurate and reliable.
However, no responsibility is assumed by Analog Devices for its use, nor for any
infringements of patents or other rights of third parties that may result from its use.
Specifications subject to change without notice. No license is granted by implication
or otherwise under any patent or patent rights of Analog Devices. Trademarks and
registered trademarks are the property of their respective owners.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781.329.4700
www.analog.com
Fax: 781.326.8703
漏 2004 Analog Devices, Inc. All rights reserved.

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