RXC鈥?/div>
R
TERM
MCL
MDA
DDCSCL
DDCSDA
HDMI RECEIVER
2
R/G/B 8X3
OR YCbCr
DATACK
DE
H
SYNC
V
SYNC
RGB
DE
SPDIF OUT
4
8-CHANNEL
I
2
S OUT
SCLK
MCLK
LRCLK
HDCP
AD9880
APPLICATIONS
Advanced TV
HDTV
Projectors
LCD monitor
Figure 1.
GENERAL DESCRIPTION
The AD9880 offers designers the flexibility of an analog interface
and high definition multimedia interface (HDMI) receiver inte-
grated on a single chip. Also included is support for high band-
width digital content protection (HDCP).
Analog Interface
The AD9880 is a complete 8-bit 150 MSPS monolithic analog inter-
face optimized for capturing component video (YPbPr) and RGB
graphics signals. Its 150 MSPS encode rate capability and full power
analog bandwidth of 330 MHz supports all HDTV formats (up to
1080 p) and FPD resolutions up to SXGA (1280 脳 1024 @ 75 Hz).
The analog interface includes a 150 MHz triple ADC with internal
1.25 V reference, a phase-locked loop (PLL), and programmable
gain, offset, and clamp control. The user provides only 1.8 V and
3.3 V power supplies, analog input, and Hsync. Three-state
Rev. 0
Information furnished by Analog Devices is believed to be accurate and reliable.
However, no responsibility is assumed by Analog Devices for its use, nor for any
infringements of patents or other rights of third parties that may result from its use.
Specifications subject to change without notice. No license is granted by implication
or otherwise under any patent or patent rights of Analog Devices. Trademarks and
registered trademarks are the property of their respective owners.
CMOS outputs can be powered from 1.8 V to 3.3 V. The
AD9880鈥檚 on-chip PLL generates a pixel clock from Hsync. Pixel
clock output frequencies range from 12 MHz to 150 MHz. PLL
clock jitter is typically less than 700 ps p-p at 150 MHz. The
AD9880 also offers full sync processing for composite sync and
sync-on-green (SOG) applications.
Digital Interface
The AD9880 contains a HDMI 1.1-compatible receiver and sup-
ports all HDTV formats (up to 1080 p and 720 p) and display
resolutions up to SXGA (1280 脳 1024 @75 Hz). The receiver
features an intrapair skew tolerance of up to one full clock cycle.
With the inclusion of HDCP, displays can now receive encrypted
video content. The AD9880 allows for authentication of a video
receiver, decryption of encoded data at the receiver, and renewa-
bility of the authentication during transmission, as specified by the
HDCP v 1.1 protocol.
Fabricated in an advanced CMOS process, the AD9880 is provided
in a space-saving, 100-lead LQFP surface-mount Pb-free plastic
package and is specified over the 0掳C to 70掳C temperature range.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781.329.4700
www.analog.com
Fax: 781.461.3113
漏 2005 Analog Devices, Inc. All rights reserved.
05087-001