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ADM2483 Datasheet

  • ADM2483

  • Half-Duplex, iCoupler? Isolated RS-485 Transceiver

  • 542.29KB

  • 21页

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Half-Duplex
iCoupler
庐
Isolated RS-485 Transceiver
ADM2483
FEATURES
RS-485 transceiver with electrical data isolation
Complies with ANSI TIA/EIA RS-485-A-1998 and
ISO 8482:1987(E)
500 kbps data rate
Slew rate鈥搇imited driver outputs
Low power operation: 2.5 mA max
Suitable for 5 V or 3 V operation (V
DD1
)
High common-mode transient immunity: >25 kV/渭s
True fail-safe receiver inputs
Glitch-free power-up/-down protection
256 nodes on bus
Thermal shutdown protection
Safety and regulatory approvals:
UL recognition: 2500 V
RMS
for 1 minute per UL 1577
CSA Component Acceptance Notice #5A
VDE Certificate of Conformity
DIN EN 60747-5-2 (VDE 0884 Rev. 2): 2003-01
DIN EN 60950 (VDE 0805): 2001-12; EN 60950: 2000
V
IORM
= 560 V peak
Operating temperature range: 鈭?0掳C to +85掳C
FUNCTIONAL BLOCK DIAGRAM
V
DD1
V
DD2
TxD
POWER_VALID
RxD
RE
GND
1
GALVANIC ISOLATION
DE
ADM2483
A
B
04736-001
GND
2
Figure 1.
APPLICATIONS
Low power RS-485/RS-422 networks
Isolated interfaces
Building control networks
Multipoint data transmission systems
GENERAL DESCRIPTION
The ADM2483 differential bus transceiver is an integrated,
galvanically isolated component designed for bidirectional data
communication on balanced, multipoint bus transmission lines.
It complies with ANSI TIA/EIA RS-485-A and ISO
8482:1987(E). Using Analog Devices鈥?/div>
iCoupler
庐
technology, the
ADM2483 combines a 3-channel isolator, a 3-state differential
line driver, and a differential input receiver into a single
package. The logic side of the device is powered with either a
5 V or 3 V supply, while the bus side uses a 5 V supply only.
The ADM2483 is slew-limited to reduce reflections with
improperly terminated transmission lines. The controlled slew
rate limits the data rate to 500 kbps. The device鈥檚 input
impedance is 96 k鈩? allowing up to 256 transceivers on the bus.
Its driver has an active-high enable. The driver differential
Rev. 0
Information furnished by Analog Devices is believed to be accurate and reliable.
However, no responsibility is assumed by Analog Devices for its use, nor for any
infringements of patents or other rights of third parties that may result from its use.
Specifications subject to change without notice. No license is granted by implication
or otherwise under any patent or patent rights of Analog Devices. Trademarks and
registered trademarks are the property of their respective owners.
outputs and receiver differential inputs are connected internally
to form a differential I/O port. When the driver is disabled or
when V
DD1
or V
DD2
= 0, this imposes minimal loading on the
bus. An active-high receiver disable, which causes the receive
output to enter a high impedance state, is provided as well.
The receiver inputs have a true fail-safe feature that ensures a
logic-high receiver output level when the inputs are open or
shorted. This guarantees that the receiver outputs are in a
known state before communication begins and at the point
when communication ends.
Current limiting and thermal shutdown features protect against
output short circuits and bus contention situations that might
cause excessive power dissipation. The part is fully specified
over the industrial temperature range and is available in a
16-lead wide body SOIC package.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781.329.4700
www.analog.com
Fax: 781.326.8703
漏 2004 Analog Devices, Inc. All rights reserved.

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