BH616UV1610 Datasheet

  • BH616UV1610

  • Ultra Low Power/High Speed CMOS SRAM

  • 133.96KB

  • 10页

  • BSI

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BSI
n
FEATURES
Ultra Low Power/High Speed CMOS SRAM
1M X 16 bit
n
DESCRIPTION
BH616UV1610
Wide V
CC
low operation voltage : 1.65V ~ 3.6V
Ultra low power consumption :
V
CC
= 3.0V
Operation current : 5.0mA at 70ns at 25
O
C
1.5mA at 1MHz at 25
O
C
Standby current : 3uA at 25
O
C
V
CC
= 2.0V
Data retention current : 3uA at 25
O
C
High speed access time :
-70
70ns at 1.8V at 85
O
C
Automatic power down when chip is deselected
Easy expansion with CE1, CE2 and OE options
I/O Configuration x8/x16 selectable by LB and UB pin.
Three state outputs and TTL compatible
Fully static operation, no clock, no refreash
Data retention supply voltage as low as 1.0V
The BH616UV1610 is a high performance, ultra low power CMOS Static
Random Access Memory organized as 1,048,576 by 16 bits and
operates in a wide range of 1.65V to 3.6V supply voltage.
Advanced CMOS technology and circuit techniques provide both high
speed and low power features with typical operating current of 1.5mA at
1MHz at 3.0V/25
O
C and maximum access time of 70ns at 1.8V/85
O
C.
Easy memory expansion is provided by an active LOW chip enable
(CE1), an active HIGH chip enable (CE2) and active LOW output
enable (OE) and three-state output drivers.
The BH616UV1610 has an automatic power down feature, reducing the
power consumption significantly when chip is deselected.
The BH616UV1610 is made with two chips of 8Mbit SRAM by stacked
multi-chip-package.
The BH616UV1610 is available in 48-ball BGA package.
n
PRODUCT FAMILY
PRODUCT
FAMILY
OPERATING
TEMPERATURE
+0
O
C to +70
O
C
BH616UV1610AI
-25 C to +85 C
O
O
V
CC
RANGE
SPEED
(ns)
V
CC
=1.8~3.6V
POWER CONSUMPTION
STANDBY
(I
CCSB1
, Max)
Operating
(I
CC
, Max)
PKG TYPE
V
CC
=3.6V V
CC
=1.8V V
CC
=3.6V V
CC
=1.8V
70
1.65V ~ 3.6V
70
20uA
25uA
15uA
20uA
10mA
10mA
7mA
BGA-48-0608
7mA
n
PIN CONFIGURATIONS
1
A
LB
2
OE
3
A0
4
A1
5
A2
6
CE2
n
BLOCK DIAGRAM
B
DQ8
UB
A3
A4
CE1
DQ0
C
DQ9
DQ10
DQ11
A5
A6
DQ1
DQ2
A12
A11
A10
A9
A8
A7
A6
A5
A4
A3
Address
Input
Buffer
10
Row
Decoder
1024
Memory Array
1024 x 16384
16384
D
VSS
A17
A7
DQ3
VCC
E
VCC
DQ12
VSS
A16
DQ4
VSS
F
DQ14
DQ13
A14
A15
DQ5
DQ6
DQ0
.
.
.
.
.
.
DQ15
.
.
.
.
.
.
16
Data
Input
Buffer
Data
Output
Buffer
16
16
Column I/O
Write Driver
Sense Amp
1024
Column Decoder
10
16
G
DQ15
A19
A12
A13
WE
DQ7
H
A18
A8
A9
A10
A11
NC
CE2, CE1
WE
OE
UB
LB
V
CC
V
SS
Control
Address Input Buffer
A19 A18 A17 A15 A14 A13 A16 A2 A1 A0
48-ball BGA top view
Brilliance Semiconductor, Inc.
reserves the right to modify document contents without notice.
Detailed product characteristic test report is available upon request and being accepted.
R0201-BH616UV1610
1
Revision 1.0
Jul.
2005

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