BR24L32-W/F-W/FJ-W/FV-W
BR24L64-W/F-W
Features
鈥?32k bit serial EEPROM organized as 4k
脳
8bit (BR24L32)
64k bit serial EEPROM organized as 8k
脳
8bit (BR24L64)
鈥?2 wire bus serial interface (2 byte Address)
鈥?Low operating voltage range (2V operating)
Read : 1.8~5.5V
Write : 1.8~5.5V
鈥?Low current consumption
Active : 3mA MAX
Standby : 2碌A MAX
鈥?Clock frequency : 100kHz MAX (1.8~5.5V)
400kHz MAX (2.5~5.5V)
鈥?Write cycle time : 5ms MAX
鈥?Address auto-increment function during read operation
鈥?Automatic erase-before-write function during write operation
鈥?Page write function : 32byte
鈥?Inadvertent write protection function
Inadvertent write protection at low voltage (Vcc Lock-out function)
WP (Write Protect) function
鈥?Schmitt trigger circuit and noise filter are built into SCL and
SDA pins
鈥?1,000,000 write cycle typical
鈥?40 years data retention
鈥?Operating temperature range : -40~85藲C
*
Pin Configurations
A0 1
A1 2
A2 3
GND 4
8 Vcc
7 WP
6 SCL
5 SDA
*
DIP8/SOP8/SOP-J8/SSOP-B8
DIP8/SOP8 (Only BR24L64)
Pin Functions
Pin Names
A0, A1, A2
GND
SDA
SCL
WP
Vcc
Ground
Serial Data Input/Output
Serial Data Clock
Write Protect
Power Supply
Functions
Slave Address Inputs
*
Under development
Block Diagram
32~64k bit EEPROM Array
A0
A1
A2
12bit:
BR24L32
13bit:
BR24L64
8bit
12bit:
BR24L32
13bit:
BR24L64
WP
SCL
SDA
Address
Decoder
Slave Words
Address Register
STOP
Data
Register
START
Control Logic
ACK
High Voltage
Generation
Voltage Detection
9
1
2
