BSI
FEATURES
Very Low Power/Voltage CMOS SRAM
32K X 8 bit
DESCRIPTION
BS62LV256
鈥?Wide Vcc operation voltage : 2.4V ~ 5.5V
鈥?Very low power consumption :
Vcc = 3.0V C-grade : 20mA (Max.) operating current
I- grade : 25mA (Max.) operating current
0.01uA (Typ.) CMOS standby current
Vcc = 5.0V C-grade : 35mA (Max.) operating current
I- grade : 40mA (Max.) operating current
0.4uA (Typ.) CMOS standby current
鈥?High speed access time :
-70
70ns (Max.) at Vcc=3.0V
鈥?Automatic power down when chip is deselected
鈥?Three state outputs and TTL compatible
鈥?Fully static operation
鈥?Data retention supply voltage as low as 1.5V
鈥?Easy expansion with CE and OE options
The BS62LV256 is a high performance, very low power CMOS
Static Random Access Memory organized as 32,768 words by 8 bits
and operates from a wide range of 2.4V to 5.5V supply voltage.
Advanced CMOS technology and circuit techniques provide both high
speed and low power features with a typical CMOS standby current of
0.01uA and maximum access time of 70ns in 3V operation.
Easy memory expansion is provided by active LOW chip
enable (CE), active LOW output enable (OE) and three-state
output drivers.
The BS62LV256 has an automatic power down feature, reducing the
power consumption significantly when chip is deselected.
The BS62LV256 is available in the DICE form, JEDEC standard
28pin 330mil Plastic SOP, 300mil Plastic SOJ, 600mil Plastic DIP and
8mmx13.4mm TSOP (normal type).
PRODUCT FAMILY
PRODUCT
FAMILY
BS62LV256SC
BS62LV256TC
BS62LV256PC
BS62LV256JC
BS62LV256DC
BS62LV256SI
BS62LV256TI
BS62LV256PI
BS62LV256JI
BS62LV256DI
OPERATING
TEMPERATURE
Vcc
RANGE
SPEED
(ns)
Vcc=
3.0V
POWER DISSIPATION
STANDBY
Operating
(I
CCSB1
, Max)
Vcc=
Vcc=
5.0V
3.0V
(I
CC
, Max)
Vcc=
Vcc=
5.0V
3.0V
PKG
TYPE
SOP-28
TSOP-28
PDIP-28
SOJ-28
DICE
SOP-28
TSOP-28
PDIP-28
SOJ-28
DICE
0
O
C to +70
O
C
2.4V ~ 5.5V
70
1uA
0.2uA
35mA
20mA
-40 C to +85 C
O
O
2.4V ~ 5.5V
70
2uA
0.4uA
40mA
25mA
PIN CONFIGURATIONS
BLOCK DIAGRAM
28
27
26
25
24
VCC
WE
A13
A8
A9
A11
OE
A10
CE
DQ7
DQ6
DQ5
DQ4
DQ3
DQ0
DQ1
DQ2
DQ3
DQ4
DQ5
DQ6
DQ7
8
Data
Input
Buffer
8
A5
A6
A7
A12
A14
A13
A8
A9
A11
512
Column I/O
Write Driver
Sense Amp
64
Column Decoder
12
CE
WE
OE
Vdd
Gnd
A4 A3 A2 A1 A0 A10
Control
Address Input Buffer
Buffer
Address
Input
鈥?/div>
1
2
3
4
5
11
12
13
14
A14
A12
A7
A6
A5
A4
A3
A2
A1
A0
DQ0
DQ1
DQ2
GND
BS62LV256SC
6
BS62LV256SI
23
7
BS62LV256PC
22
8
BS62LV256PI
21
BS62LV256JC
9
BS62LV256JI
20
10
19
18
17
16
15
18
Row
Decoder
512
Memory Array
512 x 512
OE
A11
A9
A8
A13
WE
VCC
A14
A12
A7
A6
A5
A4
A3
1
2
3
4
5
6
7
8
9
10
11
12
13
14
BS62LV256TC
BS62LV256TI
28
27
26
25
24
23
22
21
20
19
18
17
16
15
A10
CE
DQ7
DQ6
DQ5
DQ4
DQ3
GND
DQ2
DQ1
DQ0
A0
A1
A2
8
Data
Output
Buffer
8
Brilliance Semiconductor Inc
.
reserves the right to modify document contents without notice.
R0201-BS62LV256
鈥?/div>
1
Revision 2.2
April 2001
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