CD4024BC 7-Stage Ripple Carry Binary Counter
October 1987
Revised April 2002
CD4024BC
7-Stage Ripple Carry Binary Counter
General Description
The CD4024BC is a 7-stage ripple-carry binary counter.
Buffered outputs are externally available from stages 1
through 7. The counter is reset to its logical 鈥?鈥?stage by a
logical 鈥?鈥?on the reset input. The counter is advanced one
count on the negative transition of each clock pulse.
Features
s
Wide supply voltage range:
s
Low power TTL compatibility:
or 1 driving 74LS
s
High speed:
12 MHz (typ.)
3.0V to 15V
Fan out of 2 driving 74L
s
High noise immunity: 0.45 V
DD
(typ.)
input pulse rate V
DD
鈭?/div>
V
SS
=
10V
s
Fully static operation
Ordering Code:
Order Number
CD4024BCM
CD4024BCN
Package Number
M14A
N14A
Package Description
14-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150" Narrow
14-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300" Wide
Devices also available in Tape and Reel. Specify by appending the suffix letter 鈥淴鈥?to the ordering code.
Connection Diagram
Top View
漏 2002 Fairchild Semiconductor Corporation
DS005957
www.fairchildsemi.com
1
2
3
4
5
6
