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CD4066BEE4 Datasheet

  • CD4066BEE4

  • CMOS QUAD BILATERAL SWITCH

  • 545.56KB

  • 20页

  • TI

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CD4066B
CMOS QUAD BILATERAL SWITCH
SCHS051D 鈥?NOVEMBER 1998 鈥?REVISED SEPTEMBER 2003
D
D
D
D
D
D
D
D
D
15-V Digital or
卤7.5-V
Peak-to-Peak
Switching
125-鈩?Typical On-State Resistance for 15-V
Operation
Switch On-State Resistance Matched to
Within 5
鈩?/div>
Over 15-V Signal-Input Range
On-State Resistance Flat Over Full
Peak-to-Peak Signal Range
High On/Off Output-Voltage Ratio: 80 dB
Typical at f
is
= 10 kHz, R
L
= 1 k鈩?/div>
High Degree of Linearity: <0.5% Distortion
Typical at f
is
= 1 kHz, V
is
= 5 V p-p,
V
DD
鈥?V
SS
鈮?/div>
10 V, R
L
= 10 k鈩?/div>
Extremely Low Off-State Switch Leakage,
Resulting in Very Low Offset Current and
High Effective Off-State Resistance: 10 pA
Typical at V
DD
鈥?V
SS
= 10 V, T
A
= 25掳C
Extremely High Control Input Impedance
(Control Circuit Isolated From Signal
Circuit): 10
12
鈩?/div>
Typical
Low Crosstalk Between Switches: 鈥?0 dB
Typical at f
is
= 8 MHz, R
L
= 1 k鈩?/div>
D
D
D
D
D
D
Matched Control-Input to Signal-Output
Capacitance: Reduces Output Signal
Transients
Frequency Response, Switch On = 40 MHz
Typical
100% Tested for Quiescent Current at 20 V
5-V, 10-V, and 15-V Parametric Ratings
Meets All Requirements of JEDEC Tentative
Standard No. 13-B,
Standard Specifications
for Description of 鈥淏鈥?Series CMOS
Devices
Applications:
鈥?Analog Signal Switching/Multiplexing:
Signal Gating, Modulator, Squelch
Control, Demodulator, Chopper,
Commutating Switch
鈥?Digital Signal Switching/Multiplexing
鈥?Transmission-Gate Logic Implementation
鈥?Analog-to-Digital and Digital-to-Analog
Conversion
鈥?Digital Control of Frequency, Impedance,
Phase, and Analog-Signal Gain
E, F, M, NS, OR PW PACKAGE
(TOP VIEW)
SIG A IN/OUT
SIG A OUT/IN
SIG B OUT/IN
SIG B IN/OUT
CONTROL B
CONTROL C
V
SS
1
2
3
4
5
6
7
14
13
12
11
10
9
8
V
DD
CONTROL A
CONTROL D
SIG D IN/OUT
SIG D OUT/IN
SIG C OUT/IN
SIG C IN/OUT
description/ordering information
The CD4066B is a quad bilateral switch intended for the transmission or multiplexing of analog or digital signals.
It is pin-for-pin compatible with the CD4016B, but exhibits a much lower on-state resistance. In addition, the
on-state resistance is relatively constant over the full signal-input range.
The CD4066B consists of four bilateral switches, each with independent controls. Both the p and the n devices
in a given switch are biased on or off simultaneously by the control signal. As shown in Figure 1, the well of the
n-channel device on each switch is tied to either the input (when the switch is on) or to V
SS
(when the switch
is off). This configuration eliminates the variation of the switch-transistor threshold voltage with input signal and,
thus, keeps the on-state resistance low over the full operating-signal range.
The advantages over single-channel switches include peak input-signal voltage swings equal to the full supply
voltage and more constant on-state impedance over the input-signal range. However, for sample-and-hold
applications, the CD4016B is recommended.
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
Copyright
铮?/div>
2003, Texas Instruments Incorporated
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of Texas Instruments
standard warranty. Production processing does not necessarily include
testing of all parameters.
POST OFFICE BOX 655303
鈥?/div>
DALLAS, TEXAS 75265
1

CD4066BEE4 产品属性

  • 25

  • 集成电路 (IC)

  • 逻辑 - 信号开关，多路复用器，解码器

  • 4000B

  • 双向 FET 开关

  • 1 x 1:1

  • 4

  • -

  • 双电源

  • 3 V ~ 18 V

  • -55°C ~ 125°C

  • 通孔

  • 14-DIP（0.300"，7.62mm）

  • 14-PDIP

  • 管件

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