CD54/74HC365, CD54/74HCT365,
CD54/74HC366
Data sheet acquired from Harris Semiconductor
SCHS180C
November 1997 - Revised October 2003
High Speed CMOS Logic Hex Buffer/Line Driver,
Three-State Non-Inverting and Inverting
low power Schottky TTL circuits. Both circuits are capable of
driving up to 15 low power Schottky inputs.
The 鈥橦C365 and 鈥橦CT365 are non-inverting buffers, whereas
the 鈥橦C366 is an inverting buffer. These devices have two
three-state control inputs (OE1 and OE2) which are NORed
together to control all six gates.
The 鈥橦CT365 logic families are speed, function and pin
compatible with the standard LS logic family.
Features
鈥?Buffered Inputs
[ /Title
(CD74
HC365
,
CD74
HCT36
5,
CD74
HC366
,
CD74
HCT36
6)
/Sub-
ject
(High
Speed
鈥?High Current Bus Driver Outputs
鈥?Typical Propagation Delay t
PLH
, t
PHL
= 8ns at V
CC
= 5V,
C
L
= 15pF, T
A
= 25
o
C
鈥?Fanout (Over Temperature Range)
- Standard Outputs . . . . . . . . . . . . . . . 10 LSTTL Loads
- Bus Driver Outputs . . . . . . . . . . . . . 15 LSTTL Loads
鈥?Wide Operating Temperature Range . . . -55
o
C to 125
o
C
鈥?Balanced Propagation Delay and Transition Times
鈥?Signi铿乧ant Power Reduction Compared to LSTTL
Logic ICs
鈥?HC Types
- 2V to 6V Operation
- High Noise Immunity: N
IL
= 30%, N
IH
= 30% of V
CC
at V
CC
= 5V
鈥?HCT Types
- 4.5V to 5.5V Operation
- Direct LSTTL Input Logic Compatibility,
V
IL
= 0.8V (Max), V
IH
= 2V (Min)
- CMOS Input Compatibility, I
l
鈮?/div>
1碌A at V
OL
, V
OH
Ordering Information
PART NUMBER
CD54HC365F3A
CD54HC366F3A
CD54HCT365F3A
CD74HC365E
CD74HC365M
CD74HC365MT
CD74HC365M96
CD74HC366E
CD74HC366M
CD74HC366M96
CD74HCT365E
CD74HCT365M
CD74HCT365MT
CD74HCT365M96
TEMP. RANGE
(
o
C)
-55 to 125
-55 to 125
-55 to 125
-55 to 125
-55 to 125
-55 to 125
-55 to 125
-55 to 125
-55 to 125
-55 to 125
-55 to 125
-55 to 125
-55 to 125
-55 to 125
PACKAGE
16 Ld CERDIP
16 Ld CERDIP
16 Ld CERDIP
16 Ld PDIP
16 Ld SOIC
16 Ld SOIC
16 Ld SOIC
16 Ld PDIP
16 Ld SOIC
16 Ld SOIC
16 Ld PDIP
16 Ld SOIC
16 Ld SOIC
16 Ld SOIC
Description
The 鈥橦C365, 鈥橦CT365, and 鈥橦C366 silicon gate CMOS three-
state buffers are general purpose high-speed non-inverting
and inverting buffers. They have high drive current outputs
which enable high speed operation even when driving large
bus capacitances. These circuits possess the low power
dissipation of CMOS circuitry, yet have speeds comparable to
NOTE: When ordering, use the entire part number. The suf铿亁 96
denotes tape and real. The suf铿亁 T denotes a small-quantity reel of
250.
Pinout
CD54HC365, CD54HCT365, CD54HC366
(CERDIP)
CD74HC365, CD74HCT365, CD74HC366
(PDIP, SOIC)
TOP VIEW
OE1 1
1A 2
(1Y) 1Y 3
2A 4
(2Y) 2Y 5
3A 6
(3Y) 3Y 7
GND 8
16 V
CC
15 OE2
14 6A
13 6Y (6Y)
12 5A
11 5Y (5Y)
10 4A
9 4Y (4Y)
CAUTION: These devices are sensitive to electrostatic discharge. Users should follow proper IC Handling Procedures.
Copyright
漏
2003, Texas Instruments Incorporated
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