CLC016MTC Datasheet

  • CLC016MTC

  • National Semiconductor [Data Retiming PLL with Automatic Ra...

  • 445.16KB

  • NSC

扫码查看芯片数据手册

上传产品规格书

PDF预览

CLC016 Data Retiming PLL with Automatic Rate Selection
July 2002
CLC016
Data Retiming PLL with Automatic Rate Selection
General Description
National鈥檚 Comlinear CLC016 is a low-cost, monolithic, data
retiming phase-locked loop (PLL) designed for high-speed
serial clock and data recovery. The CLC016 simplifies high-
speed data recovery in multi-rate systems by incorporating
auto-rate select (ARS) circuitry on chip. This function allows
the user to configure the CLC016 to recognize up to four
different data rates and automatically adjust to provide ac-
curate, low-jitter clock and data recovery. A single resistor is
used to set each data rate anywhere between 40 Mbps and
400 Mbps. No potentiometers, crystals, or other external ICs
are required to set the rate.
The CLC016 has output jitter of only 130 ps
pp
at a 270 Mbps
data rate and 0.25% fractional loop bandwidth. Low phase
detector output offset and low VCO injection combine to
ensure that the CLC016 does not generate bit errors or large
phase transients in response to extreme fluctuations in data
transition density. The result is improved performance when
handling the pathological patterns inherent in the SMPTE
259M video industry standard.
The carrier detect and output mute functions may be used
together to automatically latch the outputs when no data is
present, preventing random transitions. The external loop
filter allows the user to tailor the loop response to the specific
application needs. The CLC016 will operate with either +5V
or 鈭?.2V power supplies. The serial data inputs and outputs,
as well as the recovered clock outputs, allow single- or
differential-ECL interfacing. The logic control inputs are TTL-
compatible.
Features
n
n
n
n
n
n
n
n
n
n
n
Retimed data output
Recovered clock output
Auto and manual rate select modes
Four user-configurable data rates
No potentiometers required
External loop bandwidth control
Frequency detector for lock acquisition
Carrier detect output
Output MUTE function
Single supply operation: +5V or 鈭?.2V
Low cost
Key Specifications
n
Low jitter: 130 ps
pp
@
270 Mbps, 0.25% fractional loop
bandwidth (0.675 MHz)
n
High data rates: 40 Mbps 鈭?400 Mbps
n
Low supply current: 100 mA, including output biasing
n
Flexible fractional loop bandwidth: from 0.05% to 0.5%
Applications
n
SMPTE 259M serial digital interfaces: NTSC/PAL, 4:2:2
component, 360 Mbps wide screen
n
Serial digital video routing and distribution
n
Clock and data recovery for high-speed data
transmission
n
Re-synchronization of serial data for SONET/SDH, ATM,
CAD networks, medical and industrial imaging
10008701
Ordering Information
Order Number
CLC016ACQ
CLC016AJQ
CLC016MTC
Temperature
0藲C to +70藲C
鈥?0藲C to +85藲C
鈥?0藲C to +85藲C
Package
PLCC V28A
PLCC V28A
TSSOP MTC28
漏 2002 National Semiconductor Corporation
DS100087
www.national.com

CLC016MTC 产品属性

  • 数据重定时

  • 105mA

  • 4.5V 到 5.5V

  • TSSOP

  • 28

  • -40°C 到 +85°C

  • No SVHC (19-Dec-2011)

  • 16

  • TSSOP

  • -40°C

  • 85°C

  • 5.5V

  • 4.5V

  • 16

  • 表面安装

  • 016

CLC016MTC相关型号PDF文件下载

您可能感兴趣的PDF文件资料

热门IC型号推荐

扫码下载APP,
一键连接广大的电子世界。

在线人工客服

买家服务:
卖家服务:
技术客服:

0571-85317607

网站技术支持

13606545031

客服在线时间周一至周五
9:00-17:30

关注官方微信号,
第一时间获取资讯。

建议反馈
返回顶部

建议反馈

联系人:

联系方式:

按住滑块,拖拽到最右边
>>
感谢您向阿库提出的宝贵意见,您的参与是维库提升服务的动力!意见一经采纳,将有感恩红包奉上哦!