DM74LS379M Datasheet

  • DM74LS379M

  • Quad Parallel Register with Enable

  • 169.17KB

  • NSC

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54LS379 DM74LS379 Quad Parallel Register with Enable
June 1989
54LS379 DM74LS379
Quad Parallel Register with Enable
General Description
The LS379 is a 4-bit register with buffered common Enable
This device is similar to the LS175 but features the common
Enable rather than common Master Reset
Features
Y
Y
Y
Y
Edge-triggered D-type inputs
Buffered positive edge-triggered clock
Buffered common enable input
True and complement outputs
Connection Diagram
Dual-In-Line Package
Logic Symbol
TL F 10186 鈥?2
TL F 10186 鈥?1
V
CC
e
Pin 16
GND
e
Pin 8
Order Number 54LS379DMQB 54LS379FMQB
54LS379LMQB DM74LS379M or DM74LS379N
See NS Package Number E20A
J16A M16A N16E or W16A
Pin
Names
E
D0鈥揇3
CP
Q0鈥換3
Q0鈥換3
Description
Enable Input (Active LOW)
Data Inputs
Clock Pulse Input (Active Rising Edge)
Flip-Flop Outputs
Complement Outputs
C
1995 National Semiconductor Corporation
TL F 10186
RRD-B30M105 Printed in U S A

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