DM54LS55 DM74LS55 2-Wide 4-Input AND-OR-INVERT Gate
April 1992
DM54LS55 DM74LS55
2-Wide 4-Input AND-OR-INVERT Gate
General Description
This device contains a combination of AND-OR-INVERT
functions The internal gates are configured as two
four-input AND gates with their outputs connected to a
two-input NOR gate
Connection Diagram
Dual-In-Line Package
TL F 10174 鈥?1
Order Number DM54LS55J DM54LS55W DM74LS55M or DM74LS55N
See NS Package Number J14A M14A N14A or W14B
Function Table
Y
e
ABCD
a
EFGH
Inputs
A
H
X
B
H
X
C
H
X
D
H
X
E
X
H
F
X
H
G
X
H
H
X
H
Output
Y
L
L
H
All Other Combinations
H
e
High Logic Level
L
e
Low Logic Level
X
e
Either Low or High Logic Level
C
1995 National Semiconductor Corporation
TL F 10174
RRD-B30M105 Printed in U S A