DM74LS645N Datasheet

  • DM74LS645N

  • Octal Bus Transceiver

  • 77.63KB

  • FAIRCHILD

扫码查看芯片数据手册

上传产品规格书

PDF预览

DM74LS645 Octal Bus Transceiver
August 1986
Revised March 2000
DM74LS645
Octal Bus Transceiver
General Description
These octal bus transceivers are designed for asynchro-
nous two-way communication between data buses. The
devices transmit data from the A bus to the B bus or from
the B bus to the A bus depending upon the level at the
direction control (DIR) input. The enable input (G) can be
used to disable the device so that the buses are effectively
isolated.
Features
s
Bi-directional bus transceivers in high-density 20-pin
packages
s
Hysteresis at bus inputs improves noise margins
s
3-STATE outputs
Ordering Code:
Order Number
DM74LS645WM
DM74LS645N
Package Number
M20B
N20A
Package Description
20-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300 Wide
20-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300 Wide
Devices also available in Tape and Reel. Specify by appending the suffix letter 鈥淴鈥?to the ordering code.
Connection Diagram
Function Table
Control
Inputs
G
L
L
H
H
=
HIGH Level
L
=
LOW Level
X
=
Irrelevant
DM74LS645
DIR
L
H
X
B data to A bus
A data to B bus
Isolation
漏 2000 Fairchild Semiconductor Corporation
DS009056
www.fairchildsemi.com

DM74LS645N 产品属性

  • Fairchild Semiconductor

  • Bipolar

  • 74LS

  • 8

  • TTL

  • TTL

  • 3-State

  • - 15 mA

  • 24 mA

  • 15 ns

  • 5.25 V

  • 4.75 V

  • + 70 C

  • DIP-20

  • Rail

  • Bus Transceiver

  • 0 C

  • Through Hole

  • 1

  • Non-Inverting

DM74LS645N相关型号PDF文件下载

您可能感兴趣的PDF文件资料

热门IC型号推荐

扫码下载APP,
一键连接广大的电子世界。

在线人工客服

买家服务:
卖家服务:

0571-85317607

客服在线时间周一至周五
9:00-17:30

关注官方微信号,
第一时间获取资讯。

建议反馈
返回顶部

建议反馈

联系人:

联系方式:

按住滑块,拖拽到最右边
>>
感谢您向阿库提出的宝贵意见,您的参与是维库提升服务的动力!意见一经采纳,将有感恩红包奉上哦!