DS1238A
MicroManager
www.dalsemi.com
FEATURES
Holds microprocessor in check during power
transients
Halts and restarts an out-of-control
microprocessor
Warns microprocessor of an impending power
failure
Converts CMOS SRAM into nonvolatile
memory
Unconditionally write protects memory when
power supply is out of tolerance
Delays write protection until completion of
the current memory cycle
Consumes less than 200 nA of battery current
Controls external power switch for high
current applications
Debounces pushbutton reset
Accurate 10% power supply monitoring
Optional 5% power supply monitoring
designated DS1238A-5
Provides orderly shutdown in microprocessor
applications
Pin-for-pin compatible with MAX691
Standard 16-pin DIP or space-saving 16-pin
SOIC
Optional industrial temperature range -40掳C
to +85掳C
PIN ASSIGNMENT
VBAT
VCCO
VCC
GND
PF
RVT
OSCIN
OSCSEL
1
2
3
4
5
6
7
8
16
15
14
13
12
11
10
9
RST
RST
WDS
CEI
CEO
ST
NMI
IN
VBAT
VCCO
VCC
GND
PF
RVT
OSCIN
OSCSEL
1
2
3
4
5
6
7
8
16
15
14
13
12
11
10
9
RST
RST
WDS
CEI
CEO
ST
NMI
IN
16-Pin DIP (300-mil)
See Mech. Drawings Section
16-Pin SOIC (300-mil)
See Mech. Drawings Section
PIN DESCRIPTION
V
BAT
V
CCO
V
CC
GND
PF
RVT
OSCIN
OSCSEL
IN
NMI
ST
CEO
CEI
WDS
RST
RST
- +3-Volt Battery Input
- Switched SRAM Supply Output
- +5-Volt Power Supply Input
- Ground
- Power-Fail
- Reset Voltage Threshold
- Oscillator In
- Oscillator Select
- Early Warning Input
- Non-Maskable Interrupt
- Strobe Input
- Chip Enable Output
- Chip Enable Input
- Watchdog Status
- Reset Output (active low)
- Reset Output (active high)
DESCRIPTION
The DS1238A MicroManager provides all the necessary functions for power supply monitoring, reset
control, and memory backup in microprocessor-based systems. A precise internal voltage reference and
comparator circuit monitor power supply status. When an out-of-tolerance condition occurs, the
microprocessor reset and power-fail outputs are forced active, and static RAM control unconditionally
write protects external memory. The DS1238A also provides early warning detection of a user-defined
threshold by driving a non-maskable interrupt. External reset control is provided by a pushbutton reset
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