FAN1655MX Datasheet_PDF文件下载_芯片资料查询

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FAN1655

3A DDR Bus Termination Regulator

Features

Sinks and sources 2.1A continuous, 3A peak

0 to +125掳C operating temperature range

5mA Buffered VREFOUT = VDDQ/2

Load regulation: VTT = VREFOUT 卤 40mV

On-chip thermal limiting

Low Cost SO-14, Power-Enhanced eTSSOP or

8-pin 5x6mm MLP packages

鈥?Low-Current Shutdown Mode

鈥?Output Short Circuit Protection

鈥?/div>

Description

The FAN1655 is a low-cost bi-directional LDO speci铿乧ally

designed for terminating DDR memory bus. It can both sink

and source up to 2.1A continuous, 3A peak, providing

enough current for most DDR applications. Load regulation

meets the JEDEC spec, VTT = VREFOUT 卤 40mV.

The FAN1655 includes a buffered reference voltage capable

of supplying up to 5mA current. On-chip thermal limiting

provides protection against a combination of power overload

and ambient temperature that would create an excessive

junction temperature. A shutdown input puts the FAN1655

into a low power mode.

The FAN1655 regulator is available in a power-enhanced

eTSSOP鈩?16, standard SOIC-14, and an 8-Lead MLP

package.

Applications

鈥?DDR Terminator VTT supply

Block Diagram

VDDQ

200k

-

VREFOUT

VREFIN

+

VTTFORCE

+

VTTFORCE

-

200k

VTTSENSE

FAN1655

VSSQ

VSS

VDD

SHDN

REV. 1.1.4 3/24/04

标准包装
2,500
类别
集成电路 (IC)
家庭
PMIC - 稳压器 - 专用型
系列
-
应用
控制器，DDR
输入电压
2.3 V ~ 3.6 V
输出数
1
输出电压
1.1 V ~ 1.8 V
工作温度
0°C ~ 125°C
安装类型
表面贴装
封装/外壳
14-SOIC（0.154"，3.90mm 宽）
供应商设备封装
14-SOIC
包装
管件

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